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Two approaches for developing generic components in VHDL
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Authors:
V. Stuikys
Kaunas University of Technology, Software Engineering Department, Studentu 50, 3031-Kaunas, Lithuania
G. Ziberkas
Kaunas University of Technology, Software Engineering Department, Studentu 50, 3031-Kaunas, Lithuania
R. Damasevicius
Kaunas University of Technology, Software Engineering Department, Studentu 50, 3031-Kaunas, Lithuania
G. Majauskas
Kaunas University of Technology, Software Engineering Department, Studentu 50, 3031-Kaunas, Lithuania
2001 Article
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· Proceeding
DATE '01
Proceedings of the conference on Design, automation and test in Europe
Page 800
IEEE Press
Piscataway, NJ
, USA
©2001
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ISBN:0-7695-0993-2
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Tags:
algorithms
cellular arrays and automata
design
performance
vhdl
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