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A circuit level implementation of an adaptive issue queue for power-aware microprocessors
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Authors:
Alper Buyuktosunoglu
University of Rochester, Electrical and Computer Engineering, Rochester, NY
David Albonesi
University of Rochester, Electrical and Computer Engineering, Rochester, NY
Stanley Schuster
IBM T. J. Watson Research Center, Yorktown Heights, NY
David Brooks
IBM T. J. Watson Research Center, Yorktown Heights, NY
Pradip Bose
IBM T. J. Watson Research Center, Yorktown Heights, NY
Peter Cook
IBM T. J. Watson Research Center, Yorktown Heights, NY
2001 Article
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Published in:
· Proceeding
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Pages 73-78
ACM
New York, NY
, USA
©2001
table of contents
ISBN:1-58113-351-0
doi>
10.1145/368122.368807
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Tags:
algorithms
algorithms implemented in hardware
design
microprocessors
microprocessors and microcomputers
performance
retrieval models
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