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Gate-level aged timing simulation methodology for hot-carrier reliability assurance
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Authors:
Yoshiyuki Kawakami
Matsushita Electric Industrial Co., Ltd., Osaka, 570-8501, Japan
Jingkun Fang
BTA Technology, Inc., San Jose, CA
Hirokazu Yonezawa
Matsushita Electric Industrial Co., Ltd., Osaka, 570-8501, Japan
Nobufusa Iwanishi
Matsushita Electric Industrial Co., Ltd., Osaka, 570-8501, Japan
Lifeng Wu
BTA Technology, Inc., San Jose, CA
Alvin I-Hsien Chen
BTA Technology, Inc., San Jose, CA
Norio Koike
Ping Chen
Chune-Sin Yeh
BTA Technology, Inc., San Jose, CA
Zhihong Liu
BTA Technology, Inc., San Jose, CA
2000 Article
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· Downloads (12 Months): 15
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Published in:
· Proceeding
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
ACM
New York, NY
, USA
©2000
table of contents
ISBN:0-7803-5974-7
doi>
10.1145/368434.368636
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