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A dynamically reconfigurable hardware-based cipher chip
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Authors:
Yukio Mitsuyama
Dept. Information Systems Eng., Osaka University, 2-1 Yamada-Oka, Suita, Osaka, 565-0871 Japan
Zaldy Andales
Dept. Information Systems Eng., Osaka University, 2-1 Yamada-Oka, Suita, Osaka, 565-0871 Japan
Takao Onoye
Dept. Communications & Computer Eng., Kyoto University, Yoshida-Honmachi, Sakyo-ku, Kyoto, 606-8501 Japan
Isao Shirakawa
Dept. Information Systems Eng., Osaka University, 2-1 Yamada-Oka, Suita, Osaka, 565-0871 Japan
2001 Article
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Published in:
· Proceeding
ASP-DAC '01
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Pages 11-12
ACM
New York, NY
, USA
©2001
table of contents
ISBN:0-7803-6634-4
doi>
10.1145/370155.370205
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design
electronics
measurement
memory technologies
performance
real-time and embedded systems
security
theory
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