(When) will FPGAs kill ASICs? (panel session)

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Authors: Rob A. Rutenbar Carnegie Mellon University
Max Baron Microprocessor Report, Cahners Electronic Group
Thomas Daniel LSI Logic
Rajeev Jayaraman Xilinx Inc.
Zvi Or-Bach eASIC Inc.
Jonathan Rose Altera Toronto Technology Centre and The University of Toronto
Carl Sechen The University of Washington
(When) will FPGAs kill ASICs? (panel session) Published by ACM 2001 Article
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· Proceeding
DAC '01 Proceedings of the 38th annual Design Automation Conference
Pages 321-322
ACM New York, NY, USA ©2001
table of contents ISBN:1-58113-297-2 doi>10.1145/378239.378499

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