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Optimizing bias-circuit design of cascode operational amplifier for wide dynamic range operations
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Authors:
Takeshi Fukumoto
Silicon Systems Research Laboratories, NEC Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa, 229-1198, Japan
Hiroyuki Okada
Semiconductor Technology Academic Research, Center (STARC) and Silicon Systems Research Laboratories, NEC Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa, 229-1198, Japan and
Kazuyuki Nakamura
Silicon Systems Research Laboratories, NEC Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa, 229-1198, Japan
Published in:
· Proceeding
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
ACM
New York, NY
, USA
©2001
table of contents
ISBN:1-58113-371-5
doi>
10.1145/383082.383174
2001 Article
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· Downloads (12 Months): 30
· Citation Count: 0
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Tags:
algorithms implemented in hardware
analog
bias-circuit
cascode
cmos
design
dynamic
experimentation
input/output circuits
low voltage
microprocessors and microcomputers
performance
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