Interconnect enhancements for a high-speed PLD architecture

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Authors: Michael Hutton Altera Corporation, San Jose, CA
Vinson Chan Altera Corporation, San Jose, CA
Peter Kazarian Altera Corporation, San Jose, CA
Victor Maruri Altera Corporation, San Jose, CA
Tony Ngai Altera Corporation, San Jose, CA
Jim Park Altera Corporation, San Jose, CA
Rakesh Patel Altera Corporation, San Jose, CA
Bruce Pedersen Altera Corporation, San Jose, CA
Jay Schleicher Altera Corporation, San Jose, CA
Sergey Shumarayev Altera Corporation, San Jose, CA
Interconnect enhancements for a high-speed PLD architecture Published by ACM 2002 Article
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· Proceeding
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Pages 3-10
ACM New York, NY, USA ©2002
table of contents ISBN:1-58113-452-5 doi>10.1145/503048.503050

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