On the high-speed VLSI implementation of errors-and-erasures correcting reed-solomon decoders

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Authors: Tong Zhang University of Minnesota
Keshab K. Parhi University of Minnesota
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· Proceeding
GLSVLSI '02 Proceedings of the 12th ACM Great Lakes symposium on VLSI
Pages 89 - 93
ACM New York, NY, USA ©2002
table of contents ISBN:1-58113-462-2 doi>10.1145/505306.505326
On the high-speed VLSI implementation of errors-and-erasures correcting reed-solomon decoders Published by ACM 2002 Article
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