SIGN IN
SIGN UP
The Clipper processor: instruction set architecture and implementation
Full Text:
PDF
Buy this Article
Authors:
W. Hollingsworth
Intergraph Corp., Palo Alto, CA
H. Sachs
Intergraph Corp., Palo Alto, CA
A. J. Smith
Univ. of California, Berkeley
Published in:
· Magazine
Communications of the ACM
CACM Homepage
archive
Volume 32 Issue 2, Feb. 1989
Pages 200-219
ACM
New York, NY
, USA
table of contents
doi>
10.1145/63342.63346
1989 Article
Bibliometrics
· Downloads (6 Weeks): 3
· Downloads (12 Months): 11
· Downloads (cumulative): 716
· Citation Count: 7
Tools and Resources
Buy this Article
Request Permissions
TOC Service:
Email
RSS
Save to Binder
Export Formats:
BibTeX
EndNote
ACM Ref
Share:
|
Tags:
clipper
design
instruction set design
measurement
performance
single-instruction-stream, single-data-stream processors
Feedback
|
Switch to
single page view
(no tabs)
**Javascript is not enabled and is required for the "tabbed view" or switch to the
single page view
**
Powered by
The ACM Guide to Computing Literature
All Tags
Export Formats
Save to Binder