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A parallel row-based algorithm for standard cell placement with integrated error control
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Authors:
J. S. Sargent
Computer Systems Group, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, Urbana, IL
P. Banerjee
Computer Systems Group, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, Urbana, IL
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· Proceeding
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
ACM
New York, NY
, USA
©1989
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ISBN:0-89791-310-8
doi>
10.1145/74382.74482
1989 Article
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· Downloads (12 Months): 9
· Citation Count: 5
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algorithms
combinatorial algorithms
design
optimization
performance
theory
vlsi
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