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A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology
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Authors:
Chao You
Rensselaer Polytechnic Institute, Troy NY
Jong-Ru Guo
Rensselaer Polytechnic Institute, Troy NY
Russell P. Kraft
Rensselaer Polytechnic Institute, Troy NY
Kuan Zhou
Rensselaer Polytechnic Institute, Troy NY
Michael Chu
Rensselaer Polytechnic Institute, Troy NY
John F. McDonald
Rensselaer Polytechnic Institute, Troy NY
2003 Article
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Published in:
· Proceeding
GLSVLSI '03
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Pages 37 - 40
ACM
New York, NY
, USA
©2003
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ISBN:1-58113-677-3
doi>
10.1145/764808.764818
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bc
bcii
cml
design
dynamic routing
fpga
gate arrays
vlsi
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