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Design and modeling of a 16-bit 1.5MSPS successive approximation ADC with non-binary capacitor array
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Authors:
Jianhua Gan
Cirrus Logic, Inc., Austin, TX
Shouli Yan
University of Texas at Austin, Austin, TX
Jacob Abraham
University of Texas at Austin, Austin, TX
Published in:
· Proceeding
GLSVLSI '03
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Pages 161 - 164
ACM
New York, NY
, USA
©2003
table of contents
ISBN:1-58113-677-3
doi>
10.1145/764808.764850
2003 Article
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Tags:
analog-to-digital converter
calibration
design
non-binary capacitor array
successive approximation
vlsi
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