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Power efficiency of voltage scaling in multiple clock, multiple voltage cores
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Authors:
Anoop Iyer
Carnegie Mellon University, Pittsburgh, PA
Diana Marculescu
Carnegie Mellon University, Pittsburgh, PA
Published in:
· Proceeding
ICCAD '02
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Pages 379-386
ACM
New York, NY
, USA
©2002
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ISBN:0-7803-7607-2
doi>
10.1145/774572.774629
2002 Article
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· Citation Count: 28
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