A 1.3GHz fifth generation SPARC64 microprocessor

doi:10.1145/775832.776010

A 1.3GHz fifth generation SPARC64 microprocessor

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Authors:	Hisashige Ando	Fujitsu Ltd. Kawasaki, Japan
	Yuuji Yoshida	Fujitsu Ltd. Kawasaki, Japan
	Aiichiro Inoue	Fujitsu Ltd. Kawasaki, Japan
	Itsumi Sugiyama	Fujitsu Ltd. Kawasaki, Japan
	Takeo Asakawa	Fujitsu Ltd. Kawasaki, Japan
	Kuniki Morita	Fujitsu Ltd. Kawasaki, Japan
	Toshiyuki Muta	Fujitsu Ltd. Kawasaki, Japan
	Tsuyoshi Motokurumada	Fujitsu Ltd. Kawasaki, Japan
	Seishi Okada	Fujitsu Ltd. Kawasaki, Japan
	Hideo Yamashita	Fujitsu Ltd. Kawasaki, Japan
	Yoshihiko Satsukawa	Fujitsu Ltd. Kawasaki, Japan
	Akihiko Konmoto	Fujitsu Ltd. Kawasaki, Japan
	Ryouichi Yamashita	Fujitsu Ltd. Kawasaki, Japan
	Hiroyuki Sugiyama	Fujitsu Ltd. Kawasaki, Japan

	2003 Article
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· Downloads (6 Weeks): 1 · Downloads (12 Months): 9 · Downloads (cumulative): 307 · Citation Count: 13

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	· Proceeding
	DAC '03 Proceedings of the 40th annual Design Automation Conference
	Pages 702-705 ACM New York, NY, USA ©2003 table of contents ISBN:1-58113-688-9 doi>10.1145/775832.776010

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Tags: clock distribution design microarchitecture microprocessor microprocessors and microcomputers reliability reliability reliability, testing, and fault-tolerance sparc unix server

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