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Inter-procedural stacked register allocation for itanium® like architecture
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Authors:
Liu Yang
Institute of Computing Technology, CAS, Beijing, P.R.China
Sun Chan
Microprocessor Research Labs, Intel Labs,Santa Clara,CA
G. R. Gao
University of Delaware
Roy Ju
Microprocessor Research Labs, Intel Labs,Santa Clara,CA
Guei-Yuan Lueh
Microprocessor Research Labs, Intel Labs,Santa Clara,CA
Zhaoqing Zhang
Institute of Computing Technology, CAS, Beijing, P.R.China
2003 Article
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Published in:
· Proceeding
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Pages 215-225
ACM
New York, NY
, USA
©2003
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ISBN:1-58113-733-8
doi>
10.1145/782814.782844
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