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A low-cost memory architecture with NAND XIP for mobile embedded systems
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Authors:
Chanik Park
SAMSUNG Electronics, Co., Ltd., Seoul, KOREA
Jaeyu Seo
SAMSUNG Electronics, Co., Ltd., Seoul, KOREA
Sunghwan Bae
SAMSUNG Electronics, Co., Ltd., Seoul, KOREA
Hyojun Kim
SAMSUNG Electronics, Co., Ltd., Seoul, KOREA
Shinhan Kim
SAMSUNG Electronics, Co., Ltd., Seoul, KOREA
Bumsoo Kim
SAMSUNG Electronics, Co., Ltd., Seoul, KOREA
2003 Article
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Published in:
· Proceeding
CODES+ISSS '03
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Pages 138-143
ACM
New York, NY
, USA
©2003
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ISBN:1-58113-742-7
doi>
10.1145/944645.944684
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Tags:
algorithms
cache memories
design
measurement
memory architecture
nand xip
performance
priority-based caching
secondary storage
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