Simulation based verification of register-transfer level behavioral synthesis tools

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Authors:	R. Ernst	Technische Universitaet Braunschweig, Braunschweig, FRG
	S. Sutarwala	AT&T Bell Laboratories, Allentown, PA
	J. Y. Jou	AT&T Bell Laboratories, Murray Hill, NJ
	M. Tong	AT&T Bell Laboratories, Murray Hill, NJ

	1990 Article
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EURO-DAC '90 Proceedings of the conference on European design automation

IEEE Computer Society Press Los Alamitos, CA, USA ©1990
table of contents ISBN:0-8186-2024-2

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