A new algorithm for transistor sizing in CMOS circuits

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Authors: C. H. Allen Wu University of California at Irvine, Irvine, CA.
Nels Vander Zanden University of California at Irvine, Irvine, CA.
Daniel Gajski University of California at Irvine, Irvine, CA.
Published in:
· Proceeding
EURO-DAC '90 Proceedings of the conference on European design automation
Pages 589-593
IEEE Computer Society Press Los Alamitos, CA, USA ©1990
table of contents ISBN:0-8186-2024-2
A new algorithm for transistor sizing in CMOS circuits 1990 Article
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