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Characterization of logic circuit techniques for high leakage CMOS technologies
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Authors:
Phillip Chin
Columbia University, New York, NY
Charles A. Zukowski
Columbia University, New York, NY
George D. Gristede
IBM T.J. Watson Research Center, Yorktown Heights, NY
Stephen Kosonocky
IBM T.J. Watson Research Center, Yorktown Heights, NY
2004 Article
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Published in:
· Proceeding
GLSVLSI '04
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Pages 230-235
ACM
New York, NY
, USA
©2004
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ISBN:1-58113-853-9
doi>
10.1145/988952.989008
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Tags:
design
experimentation
leakage current
low power
monotonic logic
performance
vlsi
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