Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion

Full Text: PDFPDF Buy this ArticleBuy this Article
Authors: Kenneth Fazel Southern Methodist University
Lun Li Southern Methodist University
Mitch Thornton Southern Methodist University
Robert B. Reese Mississippi State University
Cherrice Traver Union College
Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion Published by ACM 2004 Article
Bibliometrics Data  Bibliometrics
· Downloads (6 Weeks): 2
· Downloads (12 Months): 7
· Downloads (cumulative): 160
· Citation Count: 1

Published in:
Cover Image
 
· Proceeding
GLSVLSI '04 Proceedings of the 14th ACM Great Lakes symposium on VLSI
Pages 413-416
ACM New York, NY, USA ©2004
table of contents ISBN:1-58113-853-9 doi>10.1145/988952.989051

Tools and Resources

Share:

|
feedback Feedback | Switch to single page view (no tabs)

Powered by The ACM Guide to Computing Literature


The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2013 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us

Useful downloads: Adobe Acrobat    QuickTime    Windows Media Player    Real Player
The ACM Guide to Computing Literature
All Tags
Export Formats
 
 
Save to Binder