Design and implementation of the POWER5™ microprocessor

doi:10.1145/996566.996749

Design and implementation of the POWER5™ microprocessor

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Authors:	Joachim Clabes	IBM Systems Group, Austin, TX
	Joshua Friedrich	IBM Systems Group, Austin, TX
	Mark Sweet	IBM Systems Group, Austin, TX
	Jack DiLullo	IBM Systems Group, Austin, TX
	Sam Chu	IBM Systems Group, Austin, TX
	Donald Plass	IBM Systems Group, Poughkeepsie, NY
	James Dawson	IBM Systems Group, Poughkeepsie, NY
	Paul Muench	IBM Systems Group, Poughkeepsie, NY
	Larry Powell	IBM Systems Group, Austin, TX
	Michael Floyd	IBM Systems Group, Austin, TX
	Balaram Sinharoy	IBM Systems Group, Poughkeepsie, NY
	Mike Lee	IBM Systems Group, Austin, TX
	Michael Goulet	IBM Systems Group, Austin, TX
	James Wagoner	IBM Systems Group, Austin, TX
	Nicole Schwartz	IBM Systems Group, Austin, TX
	Steve Runyon	IBM Systems Group, Austin, TX
	Gary Gorman	IBM Systems Group, Austin, TX
	Phillip Restle	IBM Research, Yorktown Heights, NY
	Ronald Kalla	IBM Systems Group, Austin, TX
	Joseph McGill	IBM Systems Group, Austin, TX
	Steve Dodson	IBM Systems Group, Austin, TX

	2004 Article
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Published in:

	· Proceeding
	DAC '04 Proceedings of the 41st annual Design Automation Conference
	Pages 670-672 ACM New York, NY, USA ©2004 table of contents ISBN:1-58113-828-8 doi>10.1145/996566.996749

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Tags: advanced technologies clock gating design microprocessor design microprocessors and microcomputers power reduction power5 simultaneous multi-threading temperature sensor vlsi

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