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 Tien-Fu Chen

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Average citations per article15.46
Citation Count634
Publication count41
Publication years1991-2017
Available for download19
Average downloads per article472.47
Downloads (cumulative)8,977
Downloads (12 Months)322
Downloads (6 Weeks)20
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41 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
March 2017 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 22 Issue 3, May 2017
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 4,   Downloads (12 Months): 48,   Downloads (Overall): 48

Full text available: PDFPDF
To alleviate high energy dissipation of unnecessary snooping accesses, snoop filters have been designed to reduce snoop lookups. These filters have the problem of decreasing filtering efficiency, and thus usually rely on partial or whole filter reset by detecting block evictions. Unfortunately, the reset conditions occur infrequently or unevenly (called ...
Keywords: filters, computer architecture, memory architecture, Cache storage

2
June 2016 Integration, the VLSI Journal: Volume 54 Issue C, June 2016
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 0

Voltage scaling is an effective technique to reduce power consumption in processor systems. Unfortunately, timing discrepancies between L1 caches and cores occur with the scaling down of voltage. These discrepancies are primarily caused by the severe process variations of a few slow SRAM cells. Most previous designs tolerated slow cells ...
Keywords: Timing discrepancy, Timing-failure tolerance, Cache memory, Low voltage

3
March 2016 IEEE Transactions on Very Large Scale Integration (VLSI) Systems: Volume 24 Issue 3, March 2016
Publisher: IEEE Educational Activities Department
Bibliometrics:
Citation Count: 0

In a modern system-on-chip design, hundreds of cores and intellectual properties can be integrated into a single chip. To be suitable for high-performance interconnects, designers increasingly adopt advanced interconnect protocols that support novel mechanisms of parallel accessing, including outstanding transactions and out-of-order completion of transactions. To implement those novel mechanisms, ...

4 published by ACM
June 2015 DAC '15: Proceedings of the 52nd Annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 1,   Downloads (12 Months): 30,   Downloads (Overall): 123

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TCAM-based search engines are widely used in regular expression matching across multiple packets. However, the use of priority encoder results in increased energy consumption of pattern updates and search operations. This work, proposes a promising memory technology, called Priority-Decision in Memory (PDM), which eliminates the need for priority encoders and ...
Keywords: priority-decision in memory, non-volatile TCAM, memory structure, search engine architecture, deep packet inspection

5 published by ACM
June 2014 DAC '14: Proceedings of the 51st Annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 0,   Downloads (12 Months): 12,   Downloads (Overall): 186

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NVM has commonly been used to address increasingly large last-level caches (LLCs) requirements by reducing leakage. However, frequent data-writing operations result in increased energy consumption. In this context, a promising memory technology, Non-volatile SRAM (nvSRAM), enables normal and standby operation modes which can be used to store various types of ...
Keywords: Multi-core, Non-volatile SRAM, Energy reduction, Nonvolatile memory, On-chip cache architecture, Redundant store elimination, Memory structure

6 published by ACM
June 2014 DAC '14: Proceedings of the 51st Annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 3,   Downloads (12 Months): 16,   Downloads (Overall): 81

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Faced with increasingly large multicore chip designs, architects need fast and accurate simulations for their exploration of design spaces within a limited simulation time budget. In multithreaded applications, threads cannot run simultaneously. Sampling is commonly used to reduce simulation time, but conventional sampling barely detects the instantaneous program variations of ...
Keywords: Dynamic adjustment and partial sampling simulation, Multithreaded/Multicore simulation

7 published by ACM
January 2014 ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers: Volume 13 Issue 2s, January 2014
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 15,   Downloads (Overall): 261

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Dalvik virtual machine in the Android system creates a profiling barrier between VM-space applications and Linux user-space libraries. It is difficult for existing profiling tools on the Android system to definitively identify whether a bottleneck occurred in the application level, the Linux user-space level, or the Linux kernel level. Information ...
Keywords: vertical profiling, virtual machine profiling, embedded systems, Profiling, nonintrusive profiling

8
May 2012 IEEE Transactions on Very Large Scale Integration (VLSI) Systems: Volume 20 Issue 5, May 2012
Publisher: IEEE Educational Activities Department
Bibliometrics:
Citation Count: 0

Contemporary network security applications generally require the ability to perform powerful pattern matching to protect against attacks such as viruses and spam. Traditional hardware solutions are intended for firewall routers. However, the solutions in the literature for firewalls are not scalable, and they do not address the difficulty of an ...
Keywords: memory gap, algorithmic attacks, network security, virus detection, embedded system

9
February 2012 IEEE Transactions on Computers: Volume 61 Issue 2, February 2012
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 2

Traditional debugging methodologies are limited in their ability to provide debugging support for many-core parallel programming. Synchronization problems or bugs due to race conditions are particularly difficult to detect with existing debugging tools. Most traditional debugging approaches rely on globally synchronized signals, but these pose their own problems in terms ...
Keywords: NUDA, lockset, data race, nonintrusive, manycore, debugging.

10 published by ACM
October 2011 ACM Transactions on Architecture and Code Optimization (TACO): Volume 8 Issue 3, October 2011
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 10,   Downloads (Overall): 285

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Power gating is an effective technique for reducing leakage power in deep submicron CMOS technology. Microarchitectural techniques for power gating of functional units have been developed by detecting suitable idle regions and turning them off to reduce leakage energy consumption; however, wakeup of functional units is needed when instructions are ...
Keywords: Low power, leakage-power reduction, power gating

11
May 2011 Journal of Systems and Software: Volume 84 Issue 5, May, 2011
Publisher: Elsevier Science Inc.
Bibliometrics:
Citation Count: 3

Abstract: Many recent major search engines on Internet use a large-scale cluster to store a large database and cope with high query arrival rate. To design a large scale parallel information retrieval system, both performance and storage cost has to be taken into integrated consideration. Moreover, a quantitative method to ...
Keywords: Inverted file, Storage balancing, Parallel information retrieval, Load balancing

12
March 2011 Microprocessors & Microsystems: Volume 35 Issue 2, March, 2011
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 1

Today's prevailing video systems demand extreme performance that can be efficiently supported by parallel computing engines. This paper presents a novel hierarchical circuit-switched ring network on chip (called HrNoC) for the parallel engines, of which the cost, power, and latency have been extensively optimized from bottom up. First, a communication ...
Keywords: Application mapping, Hierarchical architecture, Network on chip, Video processing, Circuit-switching, Packet-switching, Ring interconnections, Network clustering

13
March 2010 DATE '10: Proceedings of the Conference on Design, Automation and Test in Europe
Publisher: European Design and Automation Association
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 0,   Downloads (12 Months): 3,   Downloads (Overall): 52

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Multicore environments are rapidly emerging and are widely used in SoC, but accompanying parallelism programming and debugging impact the ordinary sequential world. Unfortunately, according to Heisenberg's uncertainty principle, the instrument trying to probe the target will cause probe effects. Therefore, current intrusive debugging methodologies for sequential programs cannot be used ...
Keywords: debugging programming model, many-core, race detection, architecture, debugging

14
November 2009 IEEE Transactions on Circuits and Systems for Video Technology: Volume 19 Issue 11, November 2009
Publisher: IEEE Press
Bibliometrics:
Citation Count: 1

Multithreading and multicore processing are powerful ways to take advantage of parallelism in applications in order to boost a system's performance. However, exploring sufficient parallelism and achieving data locality with low communication overhead are still important research issues in embedded multithreading/ multicore design. This paper introduces the design of a ...
Keywords: digital signal processors, multiprocessor interconnection, Computer architecture, computer architecture, programming

15 published by ACM
July 2009 DAC '09: Proceedings of the 46th Annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 0,   Downloads (12 Months): 3,   Downloads (Overall): 148

Full text available: PDFPDF
Traditional debug methodologies are limited in their ability to provide debugging support for many-core parallel programming. Synchronization problems or bugs due to race conditions are particularly difficult to detect with software debugging tools. Most traditional debugging approaches rely on globally synchronized signals, but these pose problems in terms of scalability. ...
Keywords: many-core, race detection, architecture, debugging

16 published by ACM
July 2009 DAC '09: Proceedings of the 46th Annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 5
Downloads (6 Weeks): 0,   Downloads (12 Months): 7,   Downloads (Overall): 276

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Consistent with the trend towards the use of many cores in SOC and 3D Chip techniques, this paper proposes a "single-cycle ring" interconnection (SC_Ring) with ultra-low latency and minimal complexity. The proposed SC_Ring allows multiple single-cycle transactions in parallel. The main features of the circuit-switched design include a set of ...
Keywords: arbitration, single-cycle transactions, SOC, level-1 non-uniform cache architecture, memory structure, multi-core, NOC, ring interconnection

17 published by ACM
February 2008 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 13 Issue 1, January 2008
Publisher: ACM
Bibliometrics:
Citation Count: 7
Downloads (6 Weeks): 0,   Downloads (12 Months): 2,   Downloads (Overall): 506

Full text available: PDFPDF
As the number of cores on a chip increases, power consumed by the communication structures takes a significant portion of the overall power budget. In this article, we first propose a circuit-switched interconnection architecture which uses crossroad switches to construct dedicated channels dynamically between any pairs of cores for nonhuge ...
Keywords: Application specific, low power, networks on chip, systems on chips, interconnection

18
November 2007 Journal of Systems Architecture: the EUROMICRO Journal: Volume 53 Issue 11, November, 2007
Publisher: Elsevier North-Holland, Inc.
Bibliometrics:
Citation Count: 8

To support various bandwidth requirements for mobile multimedia services for future heterogeneous mobile environments, such as portable notebooks, personal digital assistants (PDAs), and 3G cellular phones, a transcoding video proxy is usually necessary to provide mobile clients with adapted video streams by not only transcoding videos to meet different needs ...
Keywords: Multimedia, Transcoding, Mobile network, Segment caching

19 published by ACM
June 2007 DAC '07: Proceedings of the 44th annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 1,   Downloads (12 Months): 2,   Downloads (Overall): 313

Full text available: PDFPDF
Multithreading and multi-core processing have been shown to be powerful approaches for boosting a system performance by taking advantage of parallelism in applications. This paper presents a processor design by unifying RISC and multithreading DSP for the sophisticated multimedia applications with advanced standards such as H.264. The proposed design not ...
Keywords: programming model, H.264., VisoMT, multithreading, multimedia processor

20
January 2007 HiPEAC'07: Proceedings of the 2nd international conference on High performance embedded architectures and compilers
Publisher: Springer-Verlag
Bibliometrics:
Citation Count: 0

Pipeline scaling provides an attractive solution for increasingly serious branch misprediction penalties within deep pipeline processor. In this paper we investigate Adaptive Pipeline Scaling (APS) techniques that are related to reducing branch misprediction penalties. We present a dual supply-voltage architecture framework that can be efficiently exploited in an deep pipeline ...



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