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 Raksit Ashok

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Bibliometrics: publication history
Average citations per article5.43
Citation Count38
Publication count7
Publication years2001-2011
Available for download6
Average downloads per article546.00
Downloads (cumulative)3,276
Downloads (12 Months)70
Downloads (6 Weeks)3
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7 results found Export Results: bibtexendnoteacmrefcsv

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1
April 2011 CGO '11: Proceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 12
Downloads (6 Weeks): 0,   Downloads (12 Months): 10,   Downloads (Overall): 103

Full text available: PDFPDF
String operations such as memcpy, memset and memcmp account for a nontrivial amount of Google datacenter resources. String operations hurt processor cache efficiency when the data accessed is not reused shortly thereafter. Such cache pollution can be avoided by using nontemporal memory access to bypass L2/L3 caches. As reuse distance ...

2 published by ACM
April 2010 CGO '10: Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 0,   Downloads (12 Months): 22,   Downloads (Overall): 275

Full text available: PdfPdf
Cross-module inter-procedural compiler optimization (IPO) and Feedback-Directed Optimization (FDO) are two important compiler techniques delivering solid performance gains. The combination of IPO and FDO delivers peak performance, but also multiplies both techniques' usability problems. In this paper, we present LIPO, a novel static IPO framework, which integrates IPO and FDO. ...
Keywords: feedback-directed, inter-procedural, cross-module, optimization

3
February 2008 Journal of Parallel and Distributed Computing: Volume 68 Issue 2, February, 2008
Publisher: Academic Press, Inc.
Bibliometrics:
Citation Count: 0

The quest to improve performance forces designers to explore finer-grained multiprocessor machines. Ever increasing chip densities based on CMOS improvements fuel research in highly parallel chip multiprocessors with 100s of processing elements. With such increasing levels of parallelism, synchronization is set to become a major performance bottleneck and efficient support ...
Keywords: Cache coherence, Energy efficiency, Fine-grained synchronization

4 published by ACM
May 2004 ACM Transactions on Computer Systems (TOCS): Volume 22 Issue 2, May 2004
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 2,   Downloads (12 Months): 11,   Downloads (Overall): 886

Full text available: PDFPDF
This article presents Cool-Mem, a family of memory system architectures that integrate conventional memory system mechanisms, energy-aware address translation, and compiler-enabled cache disambiguation techniques, to reduce energy consumption in general-purpose architectures. The solutions provided in this article leverage on interlayer tradeoffs between architecture, compiler, and operating system layers. Cool-Mem achieves ...
Keywords: Energy efficiency, translation buffers, virtually addressed caches

5 published by ACM
August 2003 ACM Transactions on Embedded Computing Systems (TECS): Volume 2 Issue 3, August 2003
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 1,   Downloads (12 Months): 9,   Downloads (Overall): 1,051

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The unique characteristics of multimedia/embedded applications dictate media-sensitive architectural and compiler approaches to reduce the power consumption of the data cache. Our goal is exploring energy savings for embedded/multimedia workloads without sacrificing performance. Here, we present two complementary media-sensitive energy-saving techniques that leverage static information. While our first technique is ...
Keywords: Low-power design, compiler-architecture interaction, tagless caching, cache partitioning

6 published by ACM
October 2002 ASPLOS X: Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Publisher: ACM
Bibliometrics:
Citation Count: 6
Downloads (6 Weeks): 0,   Downloads (12 Months): 14,   Downloads (Overall): 623

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This paper presents Cool-Mem, a family of memory system architectures that integrate conventional memory system mechanisms, energy-aware address translation, and compiler-enabled cache disambiguation techniques, to reduce energy consumption in general purpose architectures. It combines statically speculative cache access modes, a dynamic CAM based Tag-Cache used as backup for statically mispredicted ...
Also published in:
October 2002  ACM SIGPLAN Notices: Volume 37 Issue 10, October 2002 December 2002  ACM SIGARCH Computer Architecture News - Special Issue: Proceedings of the 10th annual conference on Architectural Support for Programming Languages and Operating Systems: Volume 30 Issue 5, December 2002 December 2002  ACM SIGOPS Operating Systems Review: Volume 36 Issue 5, December 2002

7
December 2001 MICRO 34: Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 15
Downloads (6 Weeks): 0,   Downloads (12 Months): 4,   Downloads (Overall): 338

Full text available: PDFPDF
We claim that the unique characteristics of multimedia applications dictate media-sensitive architectural and compiler approaches to reduce the power consumption of the data cache. Our motivation is exploring energy savings for real-time multimedia workloads without sacrificing performance. Here, we present two complementary media-sensitive energy-saving techniques that leverage static information. While ...



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