James Benjamin Saxe Authors: Add personal information
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The cost can be reduced if more software defects are detected earlier in the development cycle. This paper introduces the Extended Static Checker for Java (ESC/Java), an experimental compile-time program checker that finds common programming errors. The checker is powered by verification-condition generation ... Keywords: compile-time program checking 2 June 2006 POLICY '06: Proceedings of the Seventh IEEE International Workshop on Policies for Distributed Systems and Networks Publisher: IEEE Computer Society Bibliometrics: Citation Count: 5 As applications and systems have grown complex, so has the complexity of maintaining valid configurations for them. Usually, policies are treated as {event, condition, action} rule sets and are used to maintain systems in valid configurations. In this paper, we use policies, defined as configuration constraints on object-oriented models of ... 3 May 2005 Journal of the ACM (JACM): Volume 52 Issue 3, May 2005 Publisher: ACM Bibliometrics: Citation Count: 176 Downloads (6 Weeks): 7,   Downloads (12 Months): 58,   Downloads (Overall): 3,357 Full text available: PDF This article provides a detailed description of the automatic theorem prover Simplify, which is the proof engine of the Extended Static Checkers ESC/Java and ESC/Modula-3. Simplify uses the Nelson--Oppen method to combine decision procedures for several important theories, and also employs a matcher to reason about quantifiers. Instead of conventional ... Keywords: Theorem proving, decision procedures, program checking 4 March 2005 Science of Computer Programming - Formal methods for components and objects pragmatic aspects and applications: Volume 55 Issue 1-3, March 2005 Publisher: Elsevier North-Holland, Inc. Bibliometrics: Citation Count: 19 A technique for finding errors in computer programs is to translate a given program and its correctness criteria into a logical formula in mathematics and then let an automatic theorem prover check the validity of the formula. This approach gives the tool designer much flexibility in which conditions are to ... 5 May 2002 PLDI '02: Proceedings of the ACM SIGPLAN 2002 conference on Programming language design and implementation Publisher: ACM Bibliometrics: Citation Count: 541 Downloads (6 Weeks): 10,   Downloads (12 Months): 86,   Downloads (Overall): 3,163 Full text available: PDF Software development and maintenance are costly endeavors. The cost can be reduced if more software defects are detected earlier in the development cycle. This paper introduces the Extended Static Checker for Java (ESC/Java), an experimental compile-time program checker that finds common programming errors. The checker is powered by verification-condition generation ... Keywords: compile-time program checking Also published in: May 2002  ACM SIGPLAN Notices: Volume 37 Issue 5, May 2002 6 January 2001 POPL '01: Proceedings of the 28th ACM SIGPLAN-SIGACT symposium on Principles of programming languages Publisher: ACM Bibliometrics: Citation Count: 87 Downloads (6 Weeks): 3,   Downloads (12 Months): 48,   Downloads (Overall): 842 Full text available: PDF Current verification condition (VC) generation algorithms, such as weakest preconditions, yield a VC whose size may be exponential in the size of the code fragment being checked. This paper describes a two-stage VC generation algorithm that generates compact VCs whose size is worst-case quadratic in the size of the source ... Also published in: March 2001  ACM SIGPLAN Notices: Volume 36 Issue 3, March 2001 7 July 2000 CAV '00: Proceedings of the 12th International Conference on Computer Aided Verification Publisher: Springer-Verlag Bibliometrics: Citation Count: 16 8 June 1999 Proceedings of the Workshop on Object-Oriented Technology Publisher: Springer-Verlag Bibliometrics: Citation Count: 13 9 March 1994 Bibliometrics: Citation Count: 0 Current technology trends make it possible to build communication networks that can support high performance distributed computing. This paper describes issues in the design of a prototype switch for an arbitrary topology point-to-point network with link speeds of up to one gigabit per second. The switch deals in fixed-length ATM-style ... 10 December 1993 Formal Methods in System Design - Special issue on designing correct circuits: Volume 3 Issue 3, Dec. 1993 Publisher: Kluwer Academic Publishers Bibliometrics: Citation Count: 5 Keywords: pipeline, algorithmic transformation, retiming, circuit design, machine-checked verification 11 November 1993 ACM Transactions on Computer Systems (TOCS): Volume 11 Issue 4, Nov. 1993 Publisher: ACM Bibliometrics: Citation Count: 171 Downloads (6 Weeks): 5,   Downloads (12 Months): 66,   Downloads (Overall): 1,995 Full text available: PDF Current technology trends make it possible to build communication networks that can support high-performance distributed computing. This paper describes issues in the design of a prototype switch for an arbitrary topology point-to-point network with link speeds of up to 1 Gbit/s. The switch deals in fixed-length ATM-style cells, which it ... Keywords: ATM networks, switching scheduling, statistical matching, iterative matching 12 September 1992 ASPLOS V: Proceedings of the fifth international conference on Architectural support for programming languages and operating systems Publisher: ACM Bibliometrics: Citation Count: 7 Downloads (6 Weeks): 2,   Downloads (12 Months): 20,   Downloads (Overall): 311 Full text available: PDF Also published in: September 1992  ACM SIGPLAN Notices: Volume 27 Issue 9, Sept. 1992 13 July 1992 Proceedings of the first First International Workshop on Larch Publisher: Springer-Verlag Bibliometrics: Citation Count: 0 14 January 1992 Proceedings of the Second IFIP WG10.2/WG10.5 Workshop on Designing Correct Circuits Publisher: North-Holland Publishing Co. Bibliometrics: Citation Count: 4 15 June 1991 Algorithmica: Volume 6 Issue 1-6, June 1991 Publisher: Springer-Verlag New York, Inc. Bibliometrics: Citation Count: 0 This paper describes a circuit transformation calledretiming in which registers are added at some points in a circuit and removed from others in such a way that the functional behavior of the circuit as a whole is preserved. We show that retiming can be used to transform a given synchronous ... Keywords: Linear programming, Network flow, Digital circuitry, Graph theory, Optimization, Propagation delay, Synchronous circuitry, Systolic circuits, Pipelining, Retiming, Timing analysis 16 January 1990 Bibliometrics: Citation Count: 0 We consider the problem of determining the maximum and minimum elements {x_{1}, \ldots ,x_{n}}$, drawn from some finite universe$\cal U$of real numbers, using only unary predicates of the inputs. It is shown that$\Theta (n + \log |{\cal U} |) \$ unary predicate evaluations are necessary and sufficient, ... 17 December 1989 Discrete & Computational Geometry: Volume 4 Issue 1, December 1989 Publisher: Springer-Verlag New York, Inc. Bibliometrics: Citation Count: 0 We present an algorithm for computing certain kinds of three-dimensional convex hulls in linear time. Using this algorithm, we show that the Voronoi diagram ofn sites in the plane can be computed in �(n) time when these sites form the vertices of a convex polygon in, say, counterclockwise order. This ... Also published in: December 1989  Discrete & Computational Geometry: Volume 4 Issue 6, December 1989 18 September 1989 Discrete & Computational Geometry: Volume 4 Issue 6, Sep. 1989 Publisher: Springer-Verlag New York, Inc. Bibliometrics: Citation Count: 70 19 March 1988 Journal of Algorithms: Volume 9 Issue 1, March 1988 Publisher: Academic Press, Inc. Bibliometrics: Citation Count: 8 20 January 1987 STOC '87: Proceedings of the nineteenth annual ACM symposium on Theory of computing Publisher: ACM Bibliometrics: Citation Count: 14 Downloads (6 Weeks): 4,   Downloads (12 Months): 21,   Downloads (Overall): 1,203 Full text available: PDF We present an algorithm for computing certain kinds of three-dimensional convex hulls in linear time. Using this algorithm, we show that the Voronoi diagram of n points in the plane can be computed in &THgr;( n ) time when these points form the vertices of a convex polygon in, say, ...