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Because of the current implementation using the basic arithmetic operations, the algorithms are given in algebraic terms. However, since the operations are really of a geometric nature, it seems to us that more flexibility in the implementation ... Keywords: Index Terms- CORDIC, 3D rotations, vector normalization, geometry transforms, graphics processor. 2 September 2003 IEEE Transactions on Computers: Volume 52 Issue 9, September 2003 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 1 In this work, we present a reciprocal square root algorithm by digit recurrence and selection by a staircase function and the radix-4 implementation. As in similar algorithms for division and square root, the results are obtained correctly rounded in a straightforward manner (in constrast to existing methods to compute the ... Keywords: Combined division, square root, reciprocal square root, digit-recurrence algorithm, exact rounding, staircase selection function. 3 November 2002 Journal of VLSI Signal Processing Systems: Volume 33 Issue 1, January-February 2003 Publisher: Kluwer Academic Publishers Bibliometrics: Citation Count: 2 The multilevel reverse-carry approach has been proposed previously for fast computation of the most-significant carry of an adder. In this paper, this approach is extended to generate several carries and is applied to the implementation of single and dual adders. Specifically, the operands are split into blocks and each block ... Keywords: computer arithmetic, VLSI design, dual adders, prefix adders, most-significant-carry detection 4 July 2002 ASAP '02: Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors Publisher: IEEE Computer Society Bibliometrics: Citation Count: 3 Since a large portion of the critical path in an implementation of radix-4 division corresponds to the delay of the quotient-digit selection module, it is of interest to reduce this delay. The proposal of this paper extends the approach presented recently of prestoring the selection constants corresponding to the actual ... 5 December 2001 IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design: Volume 9 Issue 6, 12/1/2001 Publisher: IEEE Educational Activities Department Bibliometrics: Citation Count: 0 A fast calculation of the most-significant carry in an addition is required in several applications. It has been proposed to calculate this carry by detecting the most-significant carry chain and collecting the carry after this chain. The detection can be implemented by a prefix tree of AND gates and the ... Keywords: computer arithmetic, most-significant carry 6 June 2001 ARITH '01: Proceedings of the 15th IEEE Symposium on Computer Arithmetic Publisher: IEEE Computer Society Bibliometrics: Citation Count: 1 Abstract: The double-datapath organization of a floating-point adder results in a reduced latency. One of the main characteristics of this organization is the combination of the addition/subtraction with the rounding into a single Add/Round module, which is implemented as one pipeline stage and might be responsible for the cycle time. ... 7 June 2001 ARITH '01: Proceedings of the 15th IEEE Symposium on Computer Arithmetic Publisher: IEEE Computer Society Bibliometrics: Citation Count: 1 Abstract: In this work we present a reciprocal square-root algorithm by digit recurrence and selection by a staircase function, and the radix-4 implementation. As similar algorithms for division and square-root, the results are obtained correctly rounded in a straightforward manner (in contrast to existing methods to compute the reciprocal square-root). ... 8 June 2001 ARITH '01: Proceedings of the 15th IEEE Symposium on Computer Arithmetic Publisher: IEEE Computer Society Bibliometrics: Citation Count: 2 Abstract: This paper presents upper bounds on the number of zeros and of ones after the rounding bit for algebraic functions. These functions include reciprocal, division, square root, and reciprocal square root, which have been considered in previous work. We here propose simpler proofs for the previously given bounds and ... 9 January 2001 IEEE Transactions on Computers: Volume 50 Issue 1, January 2001 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 2 An extension of the very-high radix division with prescaling and selection by rounding is presented. This extension consists of increasing the effective radix of the implementation by obtaining a few additional bits of the quotient per iteration, without increasing the complexity of the unit to obtain the prescaling factor or ... Keywords: Division, very high radix, selection by rounding, recurrence prescaling. 10 July 2000 IEEE Transactions on Computers - Special issue on computer arithmetic: Volume 49 Issue 7, July 2000 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 2 A very-high radix algorithm and implementation for circular CORDIC is presented. We first present in depth the algorithm for the vectoring mode in which the selection of the digits is performed by rounding of the control variable. To assure convergence with this kind of selection, the operands are prescaled. However, ... Keywords: Very-high radix algorithms, selection by rounding, CORDIC, angle and modulus calculation, rotation. 11 July 2000 IEEE Transactions on Computers - Special issue on computer arithmetic: Volume 49 Issue 7, July 2000 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 21 This paper deals with the computation of reciprocals, square roots, inverse square roots, and some elementary functions using small tables, small multipliers, and, for some functions, a final �large� (almost full-length) multiplication. We propose a method, based on argument reduction and series expansion, that allows fast evaluation of these functions ... Keywords: Reciprocal, square root, inverse square root, logarithm, exponential, single-/double-precision operations, small multipliers, Taylor series. 12 June 2000 Journal of VLSI Signal Processing Systems - special issue on CORDIC: Volume 25 Issue 2, June 2000 Publisher: Kluwer Academic Publishers Bibliometrics: Citation Count: 3 A very-high radix algorithm and implementation for CORDIC rotation in circular and hyperbolic coordinates is presented. The selection function consists of rounding the residual. It is shown that this assures convergence from the second iteration on. For the first iteration, the selection is done by table, using a lower radix ... 13 May 2000 Journal of VLSI Signal Processing Systems: Volume 25 Issue 1, May 2000 Publisher: Kluwer Academic Publishers Bibliometrics: Citation Count: 0 CORDIC-based algorithms to compute cos ^−1 (t), sin ^−1 (t) and \sqrt{1 - t^2} are proposed. The implementation requires a standard CORDIC module plus a module to compute the direction of rotation, this being the same hardware required for the extended CORDIC vectoring, recently proposed by the authors [T. Lang ... 14 May 2000 Journal of VLSI Signal Processing Systems: Volume 25 Issue 1, May 2000 Publisher: Kluwer Academic Publishers Bibliometrics: Citation Count: 0 CORDIC-based algorithms to compute cos $$\cos ^{ - 1} (t),\sin ^{ - 1} (t)$$ and $$\sqrt {1 - t^2 }$$ are proposed. The implementation requires a standard CORDIC module plus a module to compute the direction of rotation, this being the same hardware required for the extended CORDIC vectoring, recently ... 15 October 1999 IEEE Transactions on Computers: Volume 48 Issue 10, October 1999 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 5 This paper describes the design of a leading-one prediction (LOP) logic for floating-point addition with an exact determination of the shift amount for normalization of the adder result. Leading-one prediction is a technique to calculate the number of leading zeros of the result in parallel with the addition. However, the ... Keywords: Floating-point addition, normalization, leading-one prediction. 16 August 1999 IEEE Transactions on Computers: Volume 48 Issue 8, August 1999 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 8 An algorithm for square root with prescaling and selection by rounding is developed and combined with a similar scheme for division. Since division is usually more frequent than square root, the main concern of the combined implementation is to maintain the low execution time of division, while accepting a somewhat ... Keywords: Division, square root, selection by rounding, recurrence prescaling. 17 April 1999 ARITH '99: Proceedings of the 14th IEEE Symposium on Computer Arithmetic Publisher: IEEE Computer Society Bibliometrics: Citation Count: 1 An extension of the very-high radix division with prescaling and selection by rounding is presented. This extension consists in increasing the effective radix of the implementation by obtaining a few additional bits of the quotient per iteration, without increasing the complexity of the unit to obtain the prescaling factor nor ... 18 April 1999 ARITH '99: Proceedings of the 14th IEEE Symposium on Computer Arithmetic Publisher: IEEE Computer Society Bibliometrics: Citation Count: 5 A very-high radix algorithm and implementation for circular CORDIC in vectoring mode is presented. As for division, to simplify the selection function, the operands are pre-scaled. However, in the CORDIC algorithm the coordinate x varies during the execution so several scalings might be needed; we show that two scalings are ... 19 April 1999 ARITH '99: Proceedings of the 14th IEEE Symposium on Computer Arithmetic Publisher: IEEE Computer Society Bibliometrics: Citation Count: 0 Although division is less frequent than addition and multiplication, because of its longer latency it dissipates a substantial part of the energy in floating-point units. In this paper we explore the relation between the radix and the energy dissipated. Previous work has been done on radix-4 and radix-8 division. Here ... 20 January 1999 IEEE Transactions on Computers: Volume 48 Issue 1, January 1999 Publisher: IEEE Computer Society Bibliometrics: Citation Count: 6 The general objective of our work is to develop methods to reduce the energy consumption of arithmetic modules while maintaining the delay unchanged and keeping the increase in the area to a minimum. Here, we illustrate some techniques for dividers realized in CMOS technology. The energy dissipation reduction is carried ...