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 Sule Ozev

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Average citations per article2.57
Citation Count193
Publication count75
Publication years1999-2017
Available for download32
Average downloads per article162.94
Downloads (cumulative)5,214
Downloads (12 Months)304
Downloads (6 Weeks)61
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76 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
December 2017 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 23 Issue 2, January 2018
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 25,   Downloads (12 Months): 25,   Downloads (Overall): 25

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Complex electronic systems include multiple power domains and drastically varying dynamic power consumption patterns, requiring the use of multiple power conversion and regulation units. High-frequency switching converters have been gaining prominence in the DC-DC converter market due to their high efficiency and smaller form factor. Unfortunately, they are also subject ...
Keywords: PRBS test method, Built-In Self-Test, DC DC buck converter, diagnosis method, stability

2 published by ACM
October 2017 CODES '17: Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 9,   Downloads (12 Months): 34,   Downloads (Overall): 34

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Unauthorized hardware or firmware modifications, known as trojans, can steal information, drain the battery, or damage IoT devices. This paper presents a stand-off self-referencing technique for detecting unauthorized activity. The proposed technique processes involuntary electromagnetic emissions on a separate hardware, which is physically decoupled from the device under test. When ...
Keywords: hardware/firmware trojan detection, IoT security, EM emission

3 published by ACM
August 2017 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 23 Issue 1, October 2017
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 8,   Downloads (12 Months): 51,   Downloads (Overall): 51

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This article presents a Built-in self-test (BIST) solution for polar transceivers with low cost and high accuracy. Radio frequency (RF) Polar transceivers are desirable for portable devices due to higher power efficiency compared to traditional RF Cartesian transceivers. Unfortunately, their design is quite challenging due to substantially different signal paths ...
Keywords: IQ mismatch, envelope bandwidth, delay skew

4
June 2017 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Volume 36 Issue 6, June 2017
Publisher: IEEE Press
Bibliometrics:
Citation Count: 0

Increasing process variations, coupled with the need for highly adaptable circuits, bring about tough new challenges regarding circuit testing. Circuit adaptation for process and workload variability require costly characterization/test cycles for each chip, to extract particular $ {V_{\mathrm{ dd}}/f_{\textrm {max}}}$ behavior of the device under test (DUT). ...

5 published by ACM
November 2016 ICCAD '16: Proceedings of the 35th International Conference on Computer-Aided Design
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 28,   Downloads (Overall): 44

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Flexible systems that can conform to any shape are desirable for wearable applications. Over the past decade, there have been tremendous advances in the domain of flexible electronics which enabled printing of devices, such as sensors on a flexible substrate. Despite these advances, pure flexible electronics systems are limited by ...

6 published by ACM
May 2016 ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special Section on New Physical Design Techniques for the Next Generation Integration Technology and Regular Papers: Volume 21 Issue 3, July 2016
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 30,   Downloads (Overall): 30

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RC and single-inverter-based rail clamps are widely used in semiconductor products for electrostatic discharge (ESD) protection. We propose a technology-node-independent design methodology for these rail clamp circuits that takes process, voltage, and temperature variations into consideration. The methodology can be used as a cookbook by the designer or be used ...
Keywords: on-chip ESD protection, rail clamps, Electrostatic discharge

7
March 2016 IEEE Transactions on Very Large Scale Integration (VLSI) Systems: Volume 24 Issue 3, March 2016
Publisher: IEEE Educational Activities Department
Bibliometrics:
Citation Count: 0

Failure due to aging mechanisms in CMOS devices is an important concern of RF circuits. Lifetime of analog/RF circuits is defined as the point where at least one specification will fail due to aging effects. In this brief, we present a methodology for analyzing the performance degradation of RF circuits ...

8 published by ACM
January 2016 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 21 Issue 2, January 2016
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 5,   Downloads (12 Months): 32,   Downloads (Overall): 51

Full text available: PDFPDF
Traditionally, test patterns that are generated for a given circuit are applied in an identical manner to all manufactured devices until each device under test either fails or passes each test. With increasing process variations, the statistical diversity of manufactured devices is increasing, making such one-size-fits-all approaches increasingly inefficient. Adaptive ...
Keywords: Adaptive test, hardware testing, process variations, unknown x's

9 published by ACM
June 2015 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 20 Issue 3, June 2015
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 5,   Downloads (12 Months): 29,   Downloads (Overall): 137

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Globalization of the integrated circuit design and manufacturing flow has successfully ameliorated design complexity and fabrication cost challenges, and helped deliver cost-effective products while meeting stringent time-to-market requirements. On the flip side, it has resulted in various forms of security vulnerabilities in the supply chain that involves designers, fabs, test ...
Keywords: ID generation, counterfeiting, Hardware security

10
March 2015 DATE '15: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 2,   Downloads (12 Months): 5,   Downloads (Overall): 45

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A robust and scalable technique for measuring the output voltage of a band-gap reference (BGR) circuit is described. The proposed technique is based on an ADC architecture that uses a voltage controlled oscillator (VCO) for voltage to frequency conversion. During production testing, an external voltage reference is used to approximate ...

11
March 2014 DATE '14: Proceedings of the conference on Design, Automation & Test in Europe
Publisher: European Design and Automation Association
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 4,   Downloads (12 Months): 5,   Downloads (Overall): 13

Full text available: PDFPDF
This paper presents a Built-in self-test (BIST) solution for polar transmitters with low cost. Polar transmitters are desirable for portable devices due to higher power efficiency they provide compared to traditional Cartesian transmitters. However, they generally require iterative test/measurement/calibration cycles. The delay skew between the envelope and phase signals and ...

12
March 2014 DATE '14: Proceedings of the conference on Design, Automation & Test in Europe
Publisher: European Design and Automation Association
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 2,   Downloads (12 Months): 6,   Downloads (Overall): 33

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Counterfeit ICs have become an issue for semiconductor manufacturers due to impacts on their reputation and lost revenue. Counterfeit ICs are either products that are intentionally mislabeled or legitimate products that are extracted from electronic waste. The former is easier to detect whereas the latter is harder since they are ...

13
December 2013 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Volume 32 Issue 12, December 2013
Publisher: IEEE Press
Bibliometrics:
Citation Count: 0

Efficiency of test compaction is very important for production test time minimization. Poor test compaction methods either result in long test time or low test quality for analog and mixed-signal circuits. One of the most important factors in test compaction quality is accuracy of the representation of process statistics. Accurate ...

14
June 2013 IEEE Transactions on Very Large Scale Integration (VLSI) Systems: Volume 21 Issue 6, June 2013
Publisher: IEEE Educational Activities Department
Bibliometrics:
Citation Count: 1

We present an adaptive test flow for mixed-signal circuits that aims at optimizing the test set on a per-device basis so that more test resources can be devoted to marginal devices while passing devices that are not marginal with less testing. Cumulative statistics of the process are monitored using a ...

15
April 2013 VTS '13: Proceedings of the 2013 IEEE 31st VLSI Test Symposium (VTS)
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 1

Polar transmitters are desirable for portable devices due to higher power efficiency they provide compared to traditional Cartesian transmitters. However, the difference in architecture results in differences in potential circuit impairments/fault models, leading to different test/measurement/calibration requirements. The delay skew between the envelope and phase signals and the finite envelope ...

16
March 2013 DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 2,   Downloads (12 Months): 6,   Downloads (Overall): 88

Full text available: PDFPDF
Testing and calibration of MEMS devices require physical stimulus, which results in the need for specialized test equipment and thus high test cost. It has been shown for various types of sensors that electrical stimulation can be used to facilitate lower cost calibration. In this paper, we present an electrical ...

17
March 2013 DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 3,   Downloads (12 Months): 6,   Downloads (Overall): 42

Full text available: PDFPDF
High test quality can be achieved through defect oriented testing using analog fault modeling approach. However, this approach is computationally demanding and typically hard to apply to large scale circuits. In this work, we use an improved inductive fault analysis approach to locate potential faults at layout level and calculate ...

18
March 2013 DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 2,   Downloads (12 Months): 3,   Downloads (Overall): 47

Full text available: PDFPDF
Increasing process variations, coupled with the need for highly adaptable circuits, bring about tough new challenges in terms of circuit testing. Circuit adaptation for process and workload variability require costly characterization/test cycles for each chip, in order to extract particular V dd / f max behavior of the die under ...

19
June 2012 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Volume 31 Issue 6, June 2012
Publisher: IEEE Press
Bibliometrics:
Citation Count: 0

Testing radio frequency (RF) transceivers requires the measurement of a diverse set of specifications, requiring multiple testing setups. This complicates load board design, debug, and diagnosis, as well as results in long testing time. In this paper, we present a single setup testing solution for orthogonal frequency-division multiplexing systems RF ...

20
June 2012 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Volume 31 Issue 6, June 2012
Publisher: IEEE Press
Bibliometrics:
Citation Count: 0

In this paper, we propose an adaptive test strategy that tailors the test sequence with respect to the properties of each individual instance of a circuit. Reducing the test set by analyzing the dropout patterns during characterization and eliminating the unnecessary tests has always been the approach for high volume ...



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