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 Jarmo H Takala

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Average citations per article1.71
Citation Count120
Publication count70
Publication years1999-2017
Available for download8
Average downloads per article69.38
Downloads (cumulative)555
Downloads (12 Months)244
Downloads (6 Weeks)69
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70 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
November 2017 SA '17: SIGGRAPH Asia 2017 Technical Briefs
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 33,   Downloads (12 Months): 40,   Downloads (Overall): 40

Full text available: PDFPDF
Progressive rendering, for example Monte Carlo rendering of 360° content for virtual reality headsets, is a time-consuming task. If the 3D artist notices an error while previewing the rendering, he or she must return to editing mode, do the required changes, and restart rendering. Restart is required because the rendering ...
Keywords: foveated rendering, progressive rendering, eye tracking, preview

2 published by ACM
October 2017 ACM Transactions on Graphics (TOG): Volume 36 Issue 5, October 2017
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 21,   Downloads (12 Months): 49,   Downloads (Overall): 49

Full text available: PDFPDF
Ray tracing is a computationally intensive rendering technique traditionally used in offline high-quality rendering. Powerful hardware accelerators have been recently developed that put real-time ray tracing even in the reach of mobile devices. However, rendering animated scenes remains difficult, as updating the acceleration trees for each frame is a memory-intensive ...
Keywords: HLBVH, bounding volume hierarchy, BVH, Ray tracing, ray-tracing hardware

3
July 2017 Computer Graphics Forum: Volume 36 Issue 4, July 2017
Publisher: The Eurographs Association & John Wiley & Sons, Ltd.
Bibliometrics:
Citation Count: 0

There is recent interest in GPU architectures designed to accelerate ray tracing, especially on mobile systems with limited memory bandwidth. A promising recent approach is to store and traverse Bounding Volume Hierarchies BVHs, used to accelerate ray tracing, in low arithmetic precision. However, so far there is no research on ...
Keywords: źComputing methodologies ź Ray tracing, CCS Concepts, Graphics processors

4
May 2017
Bibliometrics:
Citation Count: 0

Handbook of Signal Processing Systemsis organized in three parts. The first part motivates representative applications that drive and apply state-of-the art methods for design and implementation of signal processing systems; the second part discusses architectures for implementing these applications; the third part focuses on compilers and simulation tools, describes models ...

5 published by ACM
November 2016 SA '16: SIGGRAPH ASIA 2016 Technical Briefs
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 7,   Downloads (12 Months): 63,   Downloads (Overall): 101

Full text available: PDFPDF
High-performance ray tracing on CPU is now largely based on Multi Bounding Volume Hierarchy (MBVH) trees. We apply MBVH to a fixed-function ray tracing accelerator architecture. According to cycle-level simulations and power analysis, MBVH reduces energy per frame by an average of 24% and improves performance per area by 19% ...
Keywords: ray tracing, ray tracing hardware

6
October 2016 Journal of Signal Processing Systems: Volume 85 Issue 1, October 2016
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0

Wireless standards are evolving rapidly due to the exponential growth in the number of portable devices along with the applications with high data rate requirements. Adaptable software based signal processing implementations for these devices can make the deployment of the constantly evolving standards faster and less expensive. The flagship technology ...
Keywords: OFDM, Software defined radio, WLAN, MIMO, Parallel processing, VLIW

7
September 2016 Journal of Signal Processing Systems: Volume 84 Issue 3, September 2016
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0

Variable length encoding can considerably decrease code size in VLIW processors by reducing the number of bits wasted on encoding No Operations(NOPs). A processor may have different instruction templates where different execution slots are implicitly NOPs, but all combinations of NOPs may not be supported by the instruction templates. The ...
Keywords: Code optimization, Instruction templates, tta, vliw, Code density, Instruction scheduling, Variable length instructions

8
February 2016 GRAPP 2016: Proceedings of the 11th Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications: Volume 1: GRAPP
Publisher: SCITEPRESS - Science and Technology Publications, Lda
Bibliometrics:
Citation Count: 0

Ray tracing is a memory-intensive application. This paper presents a new ray traversal algorithm for bounding volume hierarchies. The algorithm reduces the required memory bandwidth and energy usage, but requires extra computations. This is achieved with a new kind of utilization of half-precision floating-point numbers, which are used to store ...
Keywords: Half-precision Floating-point Numbers., Bounding Volume Hierarchy, Ray Tracing

9 published by ACM
December 2015 ACM Transactions on Architecture and Code Optimization (TACO): Volume 12 Issue 4, January 2016
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 5,   Downloads (12 Months): 50,   Downloads (Overall): 148

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Static multi-issue machines, such as traditional Very Long Instructional Word (VLIW) architectures, move complexity from the hardware to the compiler. This is motivated by the ability to support high degrees of instruction-level parallelism without requiring complicated scheduling logic in the processor hardware. The simpler-control hardware results in reduced area and ...
Keywords: Code generation, integer linear programming, transport triggered architectures, instruction-level parallelism, exposed datapath

10 published by ACM
November 2015 SA '15: SIGGRAPH Asia 2015 Technical Briefs
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 2,   Downloads (12 Months): 24,   Downloads (Overall): 136

Full text available: PDFPDF
Powerful hardware accelerators have been recently developed that put interactive ray-tracing even in the reach of mobile devices. However, supplying the rendering unit with up-to date acceleration trees remains difficult, so the rendered scenes are mostly static. The restricted memory bandwidth of a mobile device is a challenge with applying ...
Keywords: hierarchy, ray-tracing hardware, HLBVH, bounding volume, ray-tracing, BVH

11
October 2015 International Journal of Parallel Programming: Volume 43 Issue 5, October 2015
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 4

OpenCL is a standard for parallel programming of heterogeneous systems. The benefits of a common programming standard are clear; multiple vendors can provide support for application descriptions written according to the standard, thus reducing the program porting effort. While the standard brings the obvious benefits of platform portability, the performance ...
Keywords: LLVM, Parallel programming, OpenCL, Performance portability, GPGPU, Heterogeneous platforms, SIMD, VLIW

12
July 2015 Journal of Signal Processing Systems: Volume 80 Issue 1, July 2015
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 1

Exposing details of the processor datapath to the programmer is motivated by improvements in the energy efficiency and the simplification of the microarchitecture. However, an instruction format that can control the data path in a more explicit manner requires more expressiveness when compared to an instruction format that implements more ...
Keywords: Processor architectures, Software bypassing, VLIW, TTA, Low power computing, Exposed datapath architectures

13
July 2015 Journal of Signal Processing Systems: Volume 80 Issue 1, July 2015
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 7

Multimedia applications and embedded platforms are both becoming very complex in order to improve user experience. Thus, multimedia developers need high-level methods to automate time-consuming and error-prone tasks. Dynamic dataflow modeling is attractive to describe complex applications, such as video codecs, at a high level of abstraction. This paper presents ...
Keywords: HEVC, Dataflow programming, Video coding, Embedded system

14 published by ACM
October 2014 CASES '14: Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 1,   Downloads (12 Months): 11,   Downloads (Overall): 62

Full text available: PDFPDF
Most power dissipation in Very Large Instruction Word (VLIW) processors occurs in their large, multi-port register files. Transport Triggered Architecture (TTA) is a VLIW variant whose exposed datapath reduces the need for RF accesses and ports. However, the comparative advantage of TTAs suffers in practice from a wide instruction word ...
Keywords: interconnection network, register file, VLIW, TTA, port sharing, design space exploration, transport triggered architecture

15
September 2014 Journal of Signal Processing Systems: Volume 76 Issue 3, September 2014
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 1

In order to navigate or localize in 3D space such as parking garages, we would need height information in addition to 2D position. Conventionally, an altimeter is used to get the floor level/height information. We propose a novel method for three - dimensional navigation and localization of a land vehicle ...
Keywords: Indoor environments, Particle filters, Sensor fusion, 3D map matching, Dead reckoning, Land vehicles

16
March 2014 Analog Integrated Circuits and Signal Processing: Volume 78 Issue 3, March 2014
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0


17
July 2013
Bibliometrics:
Citation Count: 6

Handbook of Signal Processing Systemsis organized in three parts. The first part motivates representative applications that drive and apply state-of-the art methods for design and implementation of signal processing systems; the second part discusses architectures for implementing these applications; the third part focuses on compilers and simulation tools, describes models ...

18
June 2013 Journal of Signal Processing Systems: Volume 71 Issue 3, June 2013
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0


19
June 2013 Journal of Signal Processing Systems: Volume 71 Issue 3, June 2013
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 2

As satellite signals, e.g. GPS, are severely degraded indoors or not available at all, other methods are needed for indoor positioning. In this paper, we propose methods for combining information from inertial sensors, indoor map, and WLAN signals for pedestrian indoor navigation. We present results of field tests where complementary ...
Keywords: Dead reckoning, Kalman filters, Indoor navigation, Particle filters, Inertial navigation

20
December 2012 Journal of Signal Processing Systems: Volume 69 Issue 3, December 2012
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0




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