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 Karine Heydemann

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Bibliometrics: publication history
Average citations per article2.00
Citation Count22
Publication count11
Publication years2005-2017
Available for download6
Average downloads per article254.33
Downloads (cumulative)1,526
Downloads (12 Months)510
Downloads (6 Weeks)68
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1 published by ACM
December 2017 ACM Transactions on Architecture and Code Optimization (TACO): Volume 14 Issue 4, December 2017
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 45,   Downloads (12 Months): 48,   Downloads (Overall): 48

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Secure elements widely used in smartphones, digital consumer electronics, and payment systems are subject to fault attacks. To thwart such attacks, software protections are manually inserted requiring experts and time. The explosion of the Internet of Things (IoT) in home, business, and public spaces motivates the hardening of a wider ...
Keywords: physical attacks, software protection, Compiler

2 published by ACM
September 2016 PACT '16: Proceedings of the 2016 International Conference on Parallel Architectures and Compilation
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 9,   Downloads (12 Months): 221,   Downloads (Overall): 357

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Dynamic task-parallel programming models are popular on shared-memory systems, promising enhanced scalability, load balancing and locality. Yet these promises are undermined by non-uniform memory access (NUMA). We show that using NUMA-aware task and data placement, it is possible to preserve the uniform abstraction of both computing and memory resources for ...
Keywords: memory allocation, numa, scheduling, data-flow programming, task-parallel programming

3 published by ACM
February 2016 PPoPP '16: Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 6,   Downloads (12 Months): 124,   Downloads (Overall): 317

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Dynamic task parallelism is a popular programming model on shared-memory systems. Compared to data parallel loop-based concurrency, it promises enhanced scalability, load balancing and locality. These promises, however, are undermined by non-uniform memory access (NUMA) systems. We show that it is possible to preserve the uniform hardware abstraction of contemporary ...
Also published in:
November 2016  ACM SIGPLAN Notices - PPoPP '16: Volume 51 Issue 8, August 2016

November 2015 CARDIS 2015: Revised Selected Papers of the 14th International Conference on Smart Card Research and Advanced Applications - Volume 9514
Publisher: Springer-Verlag New York, Inc.
Citation Count: 0

This paper presents a formal verification framework and tool that evaluates the robustness of software countermeasures against fault-injection attacks. By modeling reference assembly code and its protected variant as automata, the framework can generate a set of equations for an SMT solver, the solutions of which represent possible attack paths. ...
Keywords: Countermeasure, Fault attack, Formal proof

September 2014 ESORICS 2014: 19th European Symposium on Research in Computer Security - Volume 8713
Publisher: Springer-Verlag New York, Inc.
Citation Count: 1

Fault attacks can target smart card programs in order to disrupt an execution and gain an advantage over the data or the embedded functionalities. Among all possible attacks, control flow attacks aim at disrupting the normal execution flow. Identifying harmful control flow attacks as well as designing countermeasures at software ...
Keywords: control flow integrity, smart card, source level, fault attacks

6 published by ACM
August 2014 ACM Transactions on Architecture and Code Optimization (TACO): Volume 11 Issue 3, October 2014
Publisher: ACM
Citation Count: 6
Downloads (6 Weeks): 8,   Downloads (12 Months): 94,   Downloads (Overall): 460

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We present a joint scheduling and memory allocation algorithm for efficient execution of task-parallel programs on non-uniform memory architecture (NUMA) systems. Task and data placement decisions are based on a static description of the memory hierarchy and on runtime information about intertask communication. Existing locality-aware scheduling strategies for fine-grained tasks ...
Keywords: dataflow programming, dynamic scheduling, weak memory model, lock-free algorithm, FIFO queue, Kahn process network, work stealing

August 2013 FDTC '13: Proceedings of the 2013 Workshop on Fault Diagnosis and Tolerance in Cryptography
Publisher: IEEE Computer Society
Citation Count: 10

Injection of transient faults as a way to attack cryptographic implementations has been largely studied in the last decade. Several attacks that use electromagnetic fault injection against hardware or software architectures have already been presented. On micro controllers, electromagnetic fault injection has mostly been seen as a way to skip ...
Keywords: microcontroller, timing fault, electromagnetic glitch, fault attack, fault model

August 2011 Euro-Par'11: Proceedings of the 17th international conference on Parallel processing - Volume Part I
Publisher: Springer-Verlag
Citation Count: 1

Data prefetching is an effective way to bridge the increasing performance gap between processor and memory. Prefetching can improve performance but it has some side effects which may lead to no performance improvement while increasing memory pressure or to performance degradation. Adaptive prefetching aims at reducing negative effects of prefetching ...

9 published by ACM
June 2010 PLAS '10: Proceedings of the 5th ACM SIGPLAN Workshop on Programming Languages and Analysis for Security
Publisher: ACM
Citation Count: 3
Downloads (6 Weeks): 0,   Downloads (12 Months): 13,   Downloads (Overall): 183

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Smart card programs are subject to physical attacks that disturb the execution of the embedded code. These attacks enable attackers to steal valuable information or to force a malicious behavior upon the attacked code. This paper proposes a methodology to check interval security properties on smart card source codes. The ...
Keywords: physical attacks, smart card, verification

September 2006 Concurrency and Computation: Practice & Experience - 10th International Workshop on Compilers for Parallel Computers (CPC 2003): Volume 18 Issue 11, September 2006
Publisher: John Wiley and Sons Ltd.
Citation Count: 1

Embedded systems are increasingly expected to provide good performance at low cost. As the characteristics of compiled code can have an impact on the overall cost of an embedded system, a compilation strategy must be cost aware as well as achieve high performance. As one major factor for system cost ...
Keywords: loop unrolling, code optimization, feedback directed compilation, instruction level parallelism, iterative compilation

11 published by ACM
September 2005 SCOPES '05: Proceedings of the 2005 workshop on Software and compilers for embedded systems
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 0,   Downloads (12 Months): 10,   Downloads (Overall): 161

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The design of an embedded system is often heavily constrained by its performance objective and budget envelope. Software code compression may reduce the instruction memory space and then the overall cost of the system. However, it may also induce performance degradation. Previous studies proposed selective code compression using profile information ...

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