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 Alper Sen

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 alper.senatboun.edu.tr

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Bibliometrics: publication history
Average citations per article2.36
Citation Count52
Publication count22
Publication years2002-2017
Available for download9
Average downloads per article190.22
Downloads (cumulative)1,712
Downloads (12 Months)195
Downloads (6 Weeks)21
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22 results found Export Results: bibtexendnoteacmrefcsv

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1
April 2017 Journal of Software: Evolution and Process: Volume 29 Issue 4, April 2017
Publisher: John Wiley & Sons, Inc.
Bibliometrics:
Citation Count: 0

Evolutionary coupling EC is defined as the implicit relationship between 2 or more software artifacts that are frequently changed together. Changing software is widely reported to be defect-prone. In this study, we investigate the effect of EC on the defect proneness of large industrial software systems and explain why the ...
Keywords: legacy software, software defects, industrial software, mining software repositories, evolutionary coupling, measurement

2
March 2017 DATE '17: Proceedings of the Conference on Design, Automation & Test in Europe
Publisher: European Design and Automation Association
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 1,   Downloads (Overall): 1

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Programming of multicore architectures with large number of cores is a huge burden on the programmer. Parallel patterns ease this burden by presenting the developer with a set of predefined programming patterns that implement best practices in parallel programming. Since the behavior of patterns is well-known and understood they can ...

3
August 2016 International Journal of Parallel Programming: Volume 44 Issue 4, August 2016
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 1

Multicore hardware and software are becoming increasingly more complex. The programmability problem of multicore software has led to the use of parallel patterns. Parallel patterns reduce the effort and time required to develop multicore software by effectively capturing its thread communication and data sharing characteristics. Hence, detecting the parallel pattern ...
Keywords: Multi-threaded applications, Parallel patterns, Parallel programming, Multicore software, Pattern detection

4 published by ACM
May 2016 CESI '16: Proceedings of the 4th International Workshop on Conducting Empirical Studies in Industry
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 1,   Downloads (12 Months): 27,   Downloads (Overall): 92

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Context: Building defect prediction models for software projects is helpful for reducing the effort in locating defects. In this paper, we share our experiences in building a defect prediction model for a large industrial software project. We extract product and process metrics to build models and show that we can ...
Keywords: experience report, feature selection, process metrics, defect prediction, random forest

5 published by ACM
November 2015 ACM Transactions on Architecture and Code Optimization (TACO): Volume 12 Issue 4, January 2016
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 10,   Downloads (12 Months): 52,   Downloads (Overall): 238

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We introduce MINIME-GPU, a novel automated benchmark synthesis framework for graphics processing units (GPUs) that serves to speed up architectural simulation of modern GPU architectures. Our framework captures important characteristics of original GPU applications and generates synthetic GPU benchmarks using the Open Computing Language (OpenCL) library from those applications. To ...
Keywords: synthetic benchmarks, GPU, OpenCL, benchmark characterization, benchmark generation

6
October 2015 Microprocessors & Microsystems: Volume 39 Issue 7, October 2015
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 0

One of the commonly used techniques to speedup early architectural exploration and performance evaluation of new hardware architectures is to use synthetic benchmarks. This paper presents a novel automated thread-level synthetic benchmark generation framework with characterization and generation components. The resulting thread-level synthetic benchmarks are fast, portable, human-readable, and they ...
Keywords: Synthetic benchmarks, Multicore systems, Parallel patterns

7 published by ACM
September 2014 ESEM '14: Proceedings of the 8th ACM/IEEE International Symposium on Empirical Software Engineering and Measurement
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 4,   Downloads (12 Months): 48,   Downloads (Overall): 204

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Evolutionary coupling is defined as the implicit relationship between two or more software artifacts that are frequently changed together. In this study we investigate the effect of evolutionary coupling on defect proneness of a large financial legacy software in an industrial software development environment. We collected historical data for 5 ...
Keywords: mining software repositories, evolutionary coupling, measurement, legacy software, software defects

8
October 2013 Journal of Electronic Testing: Theory and Applications: Volume 29 Issue 5, October 2013
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0

Proliferation of multicore hardware boosted the need for verification of multicore software that is running on these hardware. Multicore software demands new verification techniques different from the ones used for sequential software. Many optimized compiler frameworks are arising to address the complexities of multicore software. Among these compilers, Low Level ...
Keywords: Computer-aided verification, Formal verification, Multicore software, Multithreaded programs

9
November 2012 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Volume 31 Issue 11, November 2012
Publisher: IEEE Press
Bibliometrics:
Citation Count: 0

Recently, new technologies have emerged in industrial automation platforms. A rapid modeling and simulation environment is required to integrate these new technologies with existing devices and platforms to reduce the design effort and time to market. System-level modeling is a popular design technique that provides early simulation, verification, and architectural ...

10 published by ACM
October 2012 CODES+ISSS '12: Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 3,   Downloads (12 Months): 19,   Downloads (Overall): 204

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Testbench development is a major component of simulation based verification, which is the de-facto verification technique used in the industry. Verification of a TLM design is not complete without a measure of the effectiveness of its testbenches. We devise a coverage driven testbench generation technique where the coverage metric uses ...
Keywords: tlm, mutation testing, systemc, llvm, verification

11 published by ACM
July 2012 ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world: Volume 17 Issue 3, June 2012
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 0,   Downloads (12 Months): 15,   Downloads (Overall): 355

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We describe verification and coverage methods for multicore software that uses message passing libraries for communication. Specifically, we provide techniques to improve reliability of software using the new industry standard MCAPI by the Multicore Association. We develop dynamic predictive verification techniques that allow us to find actual and potential errors ...
Keywords: coverage, predictive verification, message passing communication, Multicore software, mutation testing

12
March 2012 DATE '12: Proceedings of the Conference on Design, Automation and Test in Europe
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 5,   Downloads (Overall): 25

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Verification of embedded multicore applications is crucial as these applications are deployed in many safety critical systems. Verification task is complicated by concurrency inherent in such applications. We use mutation testing to obtain a quantitative verification coverage metric for mullticore applications developed using the new Multicore Communication API (MCAPI) standard. ...

13 published by ACM
October 2011 ACM Transactions on Design Automation of Electronic Systems (TODAES): Volume 16 Issue 4, October 2011
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 0,   Downloads (12 Months): 15,   Downloads (Overall): 370

Full text available: PDFPDF
Correct concurrent System-on-Chips (SoCs) are very hard to design and reason about. In this work, we develop an automated framework complete with concurrency-oriented verification and coverage techniques for system-level designs. Our techniques are different from traditional simulation-based reliability techniques, since concurrency information is often lost in traditional techniques. We preserve ...
Keywords: simulation, SystemC, assertion-based verification, mutation testing, concurrency, coverage, partial-orders, predictive verification

14 published by ACM
June 2008 DAC '08: Proceedings of the 45th annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 11
Downloads (6 Weeks): 1,   Downloads (12 Months): 13,   Downloads (Overall): 223

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Concurrent interaction of multi-processor systems result in errors which are difficult to find. Traditional simulation-based verification techniques remove the concurrency information by arbitrary schedulings. We present a novel simulation-based technique for SystemC that preserves and exploits concurrency information. Our approach is unique in that we can detect potential errors in ...
Keywords: ESL, assertion, deadlock, SystemC, predictive verification

15
December 2007 MTV '07: Proceedings of the 2007 Eighth International Workshop on Microprocessor Test and Verification
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

Abstract models of analog/mixed-signal (AMS) circuits can be used for formal verification and system-level simulation. The difficulty of creating these models precludes their widespread use. This paper presents an automated method to generate abstract models appropriate for system-level simulation and formal verification. This method uses simulation traces and thresholds on ...
Keywords: mixed-signal circuit, modeling, verification

16
December 2007 MTV '07: Proceedings of the 2007 Eighth International Workshop on Microprocessor Test and Verification
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

We present an efficient runtime verification environment for detecting mutual exclusion predicates. Such predicates are important for keeping the safe operation of concurrent systems. Our environment models execution traces as partial order traces to increase scalability in runtime verification. We compare two techniques implemented in POTA tool, namely k-exclusion and ...

17
December 2007 IEEE Transactions on Parallel and Distributed Systems: Volume 18 Issue 12, December 2007
Publisher: IEEE Press
Bibliometrics:
Citation Count: 1

Given a distributed computation and a global predicate, predicate detection involves determining whether there exists at least one consistent cut (or global state) of the computation that satisfies the predicate. On the other hand, computation slicing is concerned with computing the smallest subcomputation--with the least number of consistent cuts--that contains ...
Keywords: computation slicing, testing and debugging, predicate detection, program trace analysis, program trace analysis, predicate detection, computation slicing, testing and debugging

18
May 2007 Electronic Notes in Theoretical Computer Science (ENTCS): Volume 174 Issue 4, May, 2007
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 0

We describe techniques for diagnosing errors in formal equivalence checking of RTL and transistor level models of high performance microprocessors at Freescale Semiconductor Inc. We use Symbolic Trajectory based Evalaution (STE) for combinational equivalence checking. STE accurately captures transistor level behaviors. We use simulation based error diagnosis techniques and present ...
Keywords: symbolic trajectory evaluation, error diagnosis, simulation, equivalence checking

19
April 2007 IEEE Transactions on Computers: Volume 56 Issue 4, April 2007
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 9

Concurrent and distributed systems, such as System-on-Chips (SoCs), present an immense challenge for verification due to their complexity and inherent concurrency. Traditional approaches for eliminating errors in concurrent and distributed systems include formal methods and simulation. We present an approach toward combining formal methods and simulation in a technique called ...
Keywords: lattice theory., runtime verification, partial order, temporal logic, Simulation, Simulation, formal verification, runtime verification, temporal logic, partial order, lattice theory., formal verification

20
November 2005 HLDVT '05: Proceedings of the High-Level Design Validation and Test Workshop, 2005. on Tenth IEEE International
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 1

A mutation-based validation paradigm that can handle complete high-level microprocessor implementations is presented. First, a control-based coverage measure is presented that is aimed at exposing design errors that incorrectly set control signal values. A method of automatically generating a complete set of modeled errors from this coverage metric is presented ...



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