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 Takao Moriyama

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Average citations per article5.43
Citation Count38
Publication count7
Publication years2006-2013
Available for download4
Average downloads per article435.00
Downloads (cumulative)1,740
Downloads (12 Months)58
Downloads (6 Weeks)3
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7 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
September 2013 ACM Transactions on Architecture and Code Optimization (TACO): Volume 10 Issue 3, September 2013
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 0,   Downloads (12 Months): 10,   Downloads (Overall): 145

Full text available: PDFPDF
Modern processors support hardware-assist instructions (such as TRT and TROT instructions on the IBM System z) to accelerate certain functions such as delimiter search and character conversion. Such special instructions are often used in high-performance libraries, but their exploitation in optimizing compilers has been limited. We devised a new idiom ...
Keywords: Idiom recognition, JIT, Java, hardware-assist instructions, topological embedding, VMX

2
June 2012 Software—Practice & Experience: Volume 42 Issue 6, June 2012
Publisher: John Wiley & Sons, Inc.
Bibliometrics:
Citation Count: 5

Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both single-instruction multiple-data (SIMD) instructions and thread-level parallelism. In this paper, we propose a new high-performance sorting algorithm, called aligned-access sort (AA-sort), that exploits both the SIMD instructions and thread-level ...
Keywords: parallel algorithms, SIMD, VMX, merging, sorting

3
March 2012 IEEE Transactions on Parallel and Distributed Systems: Volume 23 Issue 3, March 2012
Publisher: IEEE Press
Bibliometrics:
Citation Count: 1

High productivity is critical in harnessing the power of high-performance computing systems to solve science and engineering problems. It is a challenge to bridge the gap between the hardware complexity and the software limitations. Despite significant progress in programming language, compiler, and performance tools, tuning an application remains largely a ...
Keywords: Performance tuning, performance tool.

4
August 2009 Euro-Par '09: Proceedings of the 15th International Euro-Par Conference on Parallel Processing
Publisher: Springer-Verlag
Bibliometrics:
Citation Count: 2

High productivity to the end user is critical in harnessing the power of high performance computing systems to solve science and engineering problems. It is a challenge to bridge the gap between the hardware complexity and the software limitations. Despite significant progress in language, compiler, and performance tools, tuning an ...

5 published by ACM
July 2009 PADTAD '09: Proceedings of the 7th Workshop on Parallel and Distributed Systems: Testing, Analysis, and Debugging
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 0,   Downloads (12 Months): 3,   Downloads (Overall): 66

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To optimize various high performance computing (HPC) programs on complex supercomputer architectures source-to-source optimization tools are becoming important to support network-architecture-specific and application-specific performance optimization in addition to compiler optimizations. Because of try-and-error nature of performance optimization work and complex relationships among optimizations, programmers often need to evaluate effectiveness of ...
Keywords: version management, productivity, high performance computing, performance optimization

6
September 2007 PACT '07: Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 27
Downloads (6 Weeks): 3,   Downloads (12 Months): 28,   Downloads (Overall): 919

Full text available: PDFPDF
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and thread-level parallelism. In this paper, we propose a new parallel sorting algorithm, called Aligned-Access sort (AA-sort), for shared-memory multi processors. The AA-sort algorithm takes advantage of ...

7 published by ACM
October 2006 ASPLOS XII: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 0,   Downloads (12 Months): 17,   Downloads (Overall): 610

Full text available: PDFPDF
Modern processors support hardware-assist instructions (such as TRT and TROT instructions on IBM zSeries) to accelerate certain functions such as delimiter search and character conversion. Such special instructions have often been used in high performance libraries, but they have not been exploited well in optimizing compilers except for some limited ...
Keywords: VMX, idiom recognition, JIT, hardware-assist instructions, java, topological embedding
Also published in:
October 2006  ACM SIGOPS Operating Systems Review - Proceedings of the 2006 ASPLOS Conference: Volume 40 Issue 5, December 2006 November 2006  ACM SIGPLAN Notices - Proceedings of the 2006 ASPLOS Conference: Volume 41 Issue 11, November 2006 October 2006  ACM SIGARCH Computer Architecture News - Proceedings of the 2006 ASPLOS Conference: Volume 34 Issue 5, December 2006



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