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 Gulay Yalcin

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Average citations per article2.79
Citation Count39
Publication count14
Publication years2007-2017
Available for download7
Average downloads per article148.29
Downloads (cumulative)1,038
Downloads (12 Months)179
Downloads (6 Weeks)18
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14 results found Export Results: bibtexendnoteacmrefcsv

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1
May 2017 CCGrid '17: Proceedings of the 17th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing
Publisher: IEEE Press
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 3,   Downloads (12 Months): 46,   Downloads (Overall): 46

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Fail-stop errors and Silent Data Corruptions (SDCs) are the most common failure modes for High Performance Computing (HPC) applications. There are studies that address fail-stop errors and studies that address SDCs. However few studies address both types of errors together. In this paper we propose a software-based selective replication technique ...

2
March 2016 DATE '16: Proceedings of the 2016 Conference on Design, Automation & Test in Europe
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 2,   Downloads (12 Months): 11,   Downloads (Overall): 16

Full text available: PDFPDF
The main objective of the ParaDIME project has been to minimize energy consumption at all levels of the data center. On the one hand, we have considered what can be achieved on currently existing systems, via improvements of the programming model and the runtime system. On the other hand, we ...

3
November 2015 Microprocessors & Microsystems: Volume 39 Issue 8, November 2015
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 4

Dramatic environmental and economic impact of the ever increasing power and energy consumption of modern computing devices in data centers is now a critical challenge. On the one hand, designers use technology scaling as one of the methods to face the phenomenon called dark silicon (only segments of a chip ...
Keywords: Approximate computing, Message passing accelerators, Programming models, Low power, Runtime energy optimization, Error recovery

4 published by ACM
October 2014 ACM Transactions on Architecture and Code Optimization (TACO): Volume 11 Issue 3, October 2014
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 12,   Downloads (Overall): 82

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Fault tolerance has become a fundamental concern in computer design, in addition to performance and power. Although several error detection schemes have been proposed to discover a faulty core in the system, these proposals could waste the whole core, including many error-free structures in it after error detection. Moreover, many ...
Keywords: Reliability, CAM logic

5
August 2014 DSD '14: Proceedings of the 2014 17th Euromicro Conference on Digital System Design
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

Dramatic environmental and economic impact of the ever increasing power and energy consumption of modern computing devices in data centers is now a critical challenge. On one hand, designers use technology scaling as one of the methods to face the phenomenon called dark silicon (only segments of a chip function ...
Keywords: Data center, Energy minimization, Programming model, Heterogeneous devices, Low-power

6
August 2014 Microprocessors & Microsystems: Volume 38 Issue 6, August, 2014
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 0

Reliability is becoming a major design concern in contemporary microprocessors since soft error rate is increasing due to technology scaling. Therefore, design time system vulnerability estimation is of paramount importance. Architectural Vulnerability Factor (AVF) is an early vulnerability estimation methodology. However, AVF considers that the value of a bit in ...
Keywords: Fault injection, Vulnerability, Architectural vulnerability factor, Soft errors

7 published by ACM
June 2014 SIGMETRICS '14: The 2014 ACM international conference on Measurement and modeling of computer systems
Publisher: ACM
Bibliometrics:
Citation Count: 13
Downloads (6 Weeks): 4,   Downloads (12 Months): 61,   Downloads (Overall): 332

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Continued scaling of NAND flash memory to smaller process technology nodes decreases its reliability, necessitating more sophisticated mechanisms to correctly read stored data values. To distinguish between different potential stored values, conventional techniques to read data from flash memory employ a single set of reference voltage values, which are determined ...
Keywords: fault tolerance, threshold voltage distribution, error correction, nand flash memory, program interference, ecc
Also published in:
June 2014  ACM SIGMETRICS Performance Evaluation Review - Performance evaluation review: Volume 42 Issue 1, June 2014

8
February 2014 PDP '14: Proceedings of the 2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 5

The power envelope has become a major issue for the design of computer systems. One way of reducing energy consumption is to downscale the voltage of microprocessors. However, this does not come without costs. By decreasing the voltage, the likelihood of failures increases drastically and without mechanisms for reliability, the ...
Keywords: Transactional Memory, Energy Efficiency, Scaling Supply Voltage

9 published by ACM
May 2013 CF '13: Proceedings of the ACM International Conference on Computing Frontiers
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 7,   Downloads (12 Months): 26,   Downloads (Overall): 170

Full text available: PDFPDF
Providing fault tolerance especially to mission critical applications in order to detect transient and permanent faults and to recover from them is one of the main necessity for processor designers. However, fault tolerance for multi-threaded applications presents high performance degradations due to comparing the results of the instruction streams, checkpointing ...
Keywords: HTM, redundancy, error detection, error recovery

10 published by ACM
May 2013 GLSVLSI '13: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 0,   Downloads (12 Months): 9,   Downloads (Overall): 282

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This paper proposes a novel adaptable and reliable L1 data cache design (Adapcache) with the unique capability of automatically adapting itself for different supply voltage levels and providing the highest reliability. Depending on the supply voltage level, Adapcache defines three operating modes: In high supply voltages, Adapcache provides reliability through ...
Keywords: cache design, low power design, fault tolerance

11
March 2013 DATE '13: Proceedings of the Conference on Design, Automation and Test in Europe
Publisher: EDA Consortium
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 1,   Downloads (12 Months): 14,   Downloads (Overall): 110

Full text available: PDFPDF
Reliability is an essential concern for processor designers due to increasing transient and permanent fault rates. Executing instruction streams redundantly in chip multi processors (CMP) provides high reliability since it can detect both transient and permanent faults. Additionally, it also minimizes the Silent Data Corruption rate. However, comparing the results ...

12
October 2011 PACT '11: Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 3

Fault-tolerance has become an essential concern for processor designers due to increasing transient and permanent fault rates. In this study we propose Symptom TM, a symptom-based error detection technique that recovers from errors by leveraging the abort mechanism of Transactional Memory (TM). To the best of our knowledge, this is ...
Keywords: Fault Tolerance, Hardware Transactional Memory

13
October 2011 ICCD '11: Proceedings of the 2011 IEEE 29th International Conference on Computer Design
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 2

Fault injection is a widely used approach for experiment-based dependability evaluation. Injecting faults to microarchitectural simulators is particularly appealing for researchers, since it can be utilized at the early design stage of the processor. As such, it enables a preliminary analysis of the correlation between the criticality of processor-structure level ...

14
July 2007 IEEE Computer Architecture Letters: Volume 6 Issue 2, July 2007
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 3

Soft errors caused by high energy particle strikes are becoming an increasingly important problem in microprocessor design. With increasing transistor density and die sizes, soft errors are expected to be a larger problem in the near future. Recovering from these unexpected faults may be possible by reexecuting some part of ...
Keywords: Control Structure Reliability, Control Structure Reliability, Testing, and Fault-Tolerance, Processor Architectures, Processor Architectures, Testing, and Fault-Tolerance



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