Author image not provided
 Patrice Kadionik

Authors:
Add personal information
  Affiliation history
Bibliometrics: publication history
Average citations per article2.75
Citation Count11
Publication count4
Publication years2008-2013
Available for download0
Average downloads per article0.00
Downloads (cumulative)0
Downloads (12 Months)0
Downloads (6 Weeks)0
SEARCH
ROLE
Arrow RightAuthor only


AUTHOR'S COLLEAGUES
See all colleagues of this author




BOOKMARK & SHARE


4 results found Export Results: bibtexendnoteacmrefcsv

Result 1 – 4 of 4
Sort by:

1
November 2013 Journal of Signal Processing Systems: Volume 73 Issue 2, November 2013
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 0

This paper presents a novel hardware architecture for the real-time high-throughput implementation of the adaptive deblocking filtering process specified by the H.264/AVC video coding standard. A parallel filtering order of six units is proposed according to the H.264/AVC standard. With a parallel filtering order (fully compliant with H.264/AVC) and a ...
Keywords: Filtering order, H.264/AVC video coding, ASIC, Deblocking filter

2
August 2012 Journal of Signal Processing Systems: Volume 68 Issue 2, August 2012
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 1

Motion estimation is a highly computational demanding operation during video compression process and significantly affects the output quality of an encoded sequence. Special hardware architectures are required to achieve real-time compression performance. Many fast search block matching motion estimation (BMME) algorithms have been developed in order to minimize search positions ...
Keywords: hardware implementation, H.264, FPGA, VHDL, motion estimation

3
December 2008 Design Automation for Embedded Systems: Volume 12 Issue 4, December 2008
Publisher: Kluwer Academic Publishers
Bibliometrics:
Citation Count: 1

This paper presents a HW/SW platform for embedded video system. It has been designed around an embedded RISC processor and FPGA technologies and provides video input and output interfaces. The configurable platform has been used to implement a real time video processing and vision systems. The Altera's Nios II development ...
Keywords: Video embedded systems, FPGA, H.263, Nios II softcore processor, HW/SW codesign

4
October 2008 Principles, Systems and Applications of IP Telecommunications. Services and Security for Next Generation Networks: Second International Conference, IPTComm 2008, Heidelberg, Germany, July 1-2, 2008. Revised Selected Papers
Publisher: Springer-Verlag
Bibliometrics:
Citation Count: 8

The scope of telephony is significantly broadening, providing users with a variety of communication modes, including presence status, instant messaging and videoconferencing. Furthermore, telephony is being increasingly combined with a number of non-telephony, heterogeneous resources, consisting of software entities, such as Web services, and hardware entities, such as location-tracking devices. ...



The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2019 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us