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 Ulya R. Karpuzcu

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 ukarpuzcatumn.edu

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Bibliometrics: publication history
Average citations per article5.91
Citation Count65
Publication count11
Publication years2005-2017
Available for download5
Average downloads per article236.40
Downloads (cumulative)1,182
Downloads (12 Months)523
Downloads (6 Weeks)125
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12 results found Export Results: bibtexendnoteacmrefcsv

Result 1 – 12 of 12
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1 published by ACM
January 2018 ACM Computing Surveys (CSUR): Volume 51 Issue 1, January 2018
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 95,   Downloads (12 Months): 95,   Downloads (Overall): 95

Full text available: PDFPDF
Approximate computing has gained research attention recently as a way to increase energy efficiency and/or performance by exploiting some applications’ intrinsic error resiliency. However, little attention has been given to its potential for tackling the communication bottleneck that remains one of the looming challenges to be tackled for efficient parallelism. ...
Keywords: communication reduction, approximate computing, scalability, Approximate communication

2 published by ACM
June 2017 ISCA '17: Proceedings of the 44th Annual International Symposium on Computer Architecture
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 12,   Downloads (12 Months): 158,   Downloads (Overall): 158

Full text available: PDFPDF
Tailoring the operating voltage to fine-grain temporal changes in the power and performance needs of the workload can effectively enhance power efficiency. Therefore, power-limited computing platforms of today widely deploy integrated (i.e., on-chip) voltage regulation which enables fast fine-grain voltage control. Voltage regulators convert and distribute power from an external ...
Keywords: Power distribution, thermal emergencies, on-chip voltage regulation
Also published in:
September 2017  ACM SIGARCH Computer Architecture News - ISCA'17: Volume 45 Issue 2, May 2017

3 published by ACM
April 2017 ASPLOS '17: Proceedings of the Twenty-Second International Conference on Architectural Support for Programming Languages and Operating Systems
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 13,   Downloads (12 Months): 160,   Downloads (Overall): 160

Full text available: PDFPDF
Due to imbalances in technology scaling, the energy consumption of data storage and communication by far exceeds the energy consumption of actual data production, i.e., computation. As a consequence, recomputing data can become more energy efficient than storing and retrieving precomputed data. At the same time, recomputation can relax the ...
Keywords: energy efficiency, recomputation
Also published in:
May 2017  ACM SIGPLAN Notices - ASPLOS '17: Volume 52 Issue 4, April 2017 May 2017  ACM SIGARCH Computer Architecture News - Asplos'17: Volume 45 Issue 1, March 2017

4 published by ACM
December 2016 ACM Transactions on Architecture and Code Optimization (TACO): Volume 13 Issue 4, December 2016
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 5,   Downloads (12 Months): 74,   Downloads (Overall): 91

Full text available: PDFPDF
Parallel programming introduces notoriously difficult bugs, usually referred to as concurrency bugs. This article investigates the potential for deviating from the conventional wisdom of writing concurrency bug--free, parallel programs. It explores the benefit of accepting buggy but approximately correct parallel programs by leveraging the inherent tolerance of emerging parallel applications ...
Keywords: Concurrency bugs, algorithmic noise tolerance

5
December 2016 IEEE Transactions on Very Large Scale Integration (VLSI) Systems: Volume 24 Issue 12, December 2016
Publisher: IEEE Educational Activities Department
Bibliometrics:
Citation Count: 0

In this paper, we study two different ON-chip power delivery schemes, namely, fully integrated voltage regulator (FIVR) and low-dropout regulator (LDO), and analyze their effect on total system power under process variation, assuming a realistic dynamic voltage–frequency scaling (DVFS) system. The impact of different task scheduling algorithms on the overall ...

6
October 2015 ICCD '15: Proceedings of the 2015 33rd IEEE International Conference on Computer Design (ICCD)
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

Mobile computing devices demand processors to offer a wide range of performance/power trade-offs so that they can provide much needed high performance or low power consumption depending on a given operating requirement. While dynamic voltage/frequency scaling (DVFS) has been the most powerful technique to provide such trade-offs, few processor vendors ...

7
April 2014 IEEE Transactions on Very Large Scale Integration (VLSI) Systems: Volume 22 Issue 4, April 2014
Publisher: IEEE Educational Activities Department
Bibliometrics:
Citation Count: 3

Per-core voltage domains can improve performance under a power constraint. Most commercial processors, however, only have a single voltage domain for all processor cores. This is because splitting the single voltage domain into per-core voltage domains and powering them with multiple off-chip voltage regulators (VRs) incur a high cost for ...

8
July 2013 IEEE Micro: Volume 33 Issue 4, July 2013
Publisher: IEEE Computer Society Press
Bibliometrics:
Citation Count: 5

Near-threshold voltage computing (NTC) promises significant improvement in energy efficiency. Unfortunately, when compared to conventional, super-threshold voltage computing (STC), NTC is more sensitive to parametric variation. This results in not only slower and leakier cores, but also substantial speed and power differences between the cores in a many-core chip. NTC's ...
Keywords: Energy efficiency,System-on-chip,Threshold voltage,Random access memory,Delays,Computational modeling,Power distribution,near-threshold voltage,multicores,energy and power efficiency,resilience,parameter variation

9
February 2013 HPCA '13: Proceedings of the 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 12

While Near-Threshold Voltage Computing (NTC) is a promising approach to push back the manycore power wall, it suffers from a high sensitivity to parameter variations. One possible way to cope with variations is to use multiple on-chip voltage (Vdd) domains. However, this paper finds that such an approach is energy ...

10
June 2012 DSN '12: Proceedings of the 2012 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 16

Near-Threshold Computing (NTC), where the supply voltage is only slightly higher than the threshold voltage of transistors, is a promising approach to attain energy-efficient computing. Unfortunately, compared to the conventional Super-Threshold Computing (STC), NTC is more sensitive to process variations, which results in higher power consumption and lower frequencies than ...
Keywords: Power constraints,Process variations,Near-threshold voltage,Manycore architectures,SRAM fault models

11 published by ACM
December 2009 MICRO 42: Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Publisher: ACM
Bibliometrics:
Citation Count: 21
Downloads (6 Weeks): 4,   Downloads (12 Months): 11,   Downloads (Overall): 351

Full text available: PDFPDF
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly increasing with technology scaling. In future designs, many of the cores may have to be dormant at any ...
Keywords: power wall, process scaling, processor aging, voltage scaling

12 published by ACM
June 2005 GECCO '05: Proceedings of the 7th annual workshop on Genetic and evolutionary computation
Publisher: ACM
Bibliometrics:
Citation Count: 2
Downloads (6 Weeks): 2,   Downloads (12 Months): 6,   Downloads (Overall): 296

Full text available: PDFPDF
This work aims to investigate the automatic generation of Verilog code, representing digital circuits through Grammatical Evolution (GE). Preliminary tests using a simple full adder generation problem have been performed.
Keywords: verilog, automatic code generation, grammatical evolution



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