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 Yunsup Lee

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 yunsupatcs.berkeley.edu

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Bibliometrics: publication history
Average citations per article14.11
Citation Count127
Publication count9
Publication years2010-2016
Available for download7
Average downloads per article438.57
Downloads (cumulative)3,070
Downloads (12 Months)427
Downloads (6 Weeks)30
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9 results found Export Results: bibtexendnoteacmrefcsv

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1
June 2016 ISCA '16: Proceedings of the 43rd International Symposium on Computer Architecture
Publisher: IEEE Press
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 9,   Downloads (12 Months): 119,   Downloads (Overall): 148

Full text available: PDFPDF
This paper presents a sample-based energy simulation methodology that enables fast and accurate estimations of performance and average power for arbitrary RTL designs. Our approach uses an FPGA to simultaneously simulate the performance of an RTL design and to collect samples containing exact RTL state snapshots. Each snapshot is then ...
Keywords: power estimation, FPGA, statistical sampling, energy, hardware, modeling
Also published in:
October 2016  ACM SIGARCH Computer Architecture News - ISCA'16: Volume 44 Issue 3, June 2016

2
March 2016 IEEE Micro: Volume 36 Issue 2, March 2016
Publisher: IEEE Computer Society Press
Bibliometrics:
Citation Count: 0

The final phase of CMOS technology scaling provides continued increases in already vast transistor counts, but only minimal improvements in energy efficiency, thus requiring innovation in circuits and architectures. However, even huge teams are struggling to complete large, complex designs on schedule using traditional rigid development flows. This article presents ...

3 published by ACM
June 2015 ISCA '15: Proceedings of the 42nd Annual International Symposium on Computer Architecture
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 6,   Downloads (12 Months): 119,   Downloads (Overall): 371

Full text available: PDFPDF
To aid application characterization and architecture design space exploration, researchers and engineers have developed a wide range of tools for CPUs, including simulators, profilers, and binary instrumentation tools. With the advent of GPU computing, GPU manufacturers have developed similar tools leveraging hardware profiling and debugging hooks. To date, these tools ...
Also published in:
January 2016  ACM SIGARCH Computer Architecture News - ISCA'15: Volume 43 Issue 3, June 2015

4
December 2014 MICRO-47: Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 3,   Downloads (12 Months): 19,   Downloads (Overall): 123

Full text available: PDFPDF
Data-parallel architectures must provide efficient support for complex control-flow constructs to support sophisticated applications coded in modern single-program multiple-data languages. As these architectures have wide data paths that process a single instruction across parallel threads, a mechanism is needed to track and sequence threads as they traverse potentially divergent control ...

5 published by ACM
August 2013 ACM Transactions on Computer Systems (TOCS): Volume 31 Issue 3, August 2013
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 3,   Downloads (12 Months): 39,   Downloads (Overall): 664

Full text available: PDFPDF
We present a taxonomy and modular implementation approach for data-parallel accelerators, including the MIMD, vector-SIMD, subword-SIMD, SIMT, and vector-thread (VT) architectural design patterns. We introduce Maven, a new VT microarchitecture based on the traditional vector-SIMD microarchitecture, that is considerably simpler to implement and easier to program than previous VT designs. ...

6 published by ACM
June 2012 DAC '12: Proceedings of the 49th Annual Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 27
Downloads (6 Weeks): 5,   Downloads (12 Months): 76,   Downloads (Overall): 450

Full text available: PDFPDF
In this paper we introduce Chisel , a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. By embedding Chisel in the Scala programming language, we raise the level of hardware design abstraction by providing concepts including object orientation, functional programming, ...
Keywords: CAD

7
March 2012 Parallel Computing: Volume 38 Issue 3, March, 2012
Publisher: Elsevier Science Publishers B. V.
Bibliometrics:
Citation Count: 35

High-performance computing has recently seen a surge of interest in heterogeneous systems, with an emphasis on modern Graphics Processing Units (GPUs). These devices offer tremendous potential for performance and efficiency in important large-scale applications of computational science. However, exploiting this potential can be challenging, as one must adapt to the ...
Keywords: Software engineering, Code generation, High-level languages, Many-core, CUDA, GPU, Massive parallelism, Single-instruction multiple-data, Automated tuning, OpenCL

8 published by ACM
June 2011 ISCA '11: Proceedings of the 38th annual international symposium on Computer architecture
Publisher: ACM
Bibliometrics:
Citation Count: 30
Downloads (6 Weeks): 3,   Downloads (12 Months): 48,   Downloads (Overall): 888

Full text available: PDFPDF
We present a taxonomy and modular implementation approach for data-parallel accelerators, including the MIMD, vector-SIMD, subword-SIMD, SIMT, and vector-thread (VT) architectural design patterns. We have developed a new VT microarchitecture, Maven, based on the traditional vector-SIMD microarchitecture that is considerably simpler to implement and easier to program than previous VT ...
Keywords: vector-thread architectures, vt architectures, simplified vt architectures, simplified vector-thread architectures, data-parallel accelerators, maven
Also published in:
June 2011  ACM SIGARCH Computer Architecture News - ISCA '11: Volume 39 Issue 3, June 2011

9 published by ACM
June 2010 DAC '10: Proceedings of the 47th Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 21
Downloads (6 Weeks): 1,   Downloads (12 Months): 7,   Downloads (Overall): 426

Full text available: PDFPDF
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throughput, cycle-accurate full-system simulator that runs on a single Xilinx Virtex-5 FPGA board, and which simulates a 64-core shared-memory target machine capable of booting real operating ...
Keywords: FPGA, simulation, multiprocessors



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