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 Carolejean Wu

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Bibliometrics: publication history
Average citations per article18.25
Citation Count73
Publication count4
Publication years2011-2011
Available for download3
Average downloads per article787.67
Downloads (cumulative)2,363
Downloads (12 Months)290
Downloads (6 Weeks)8
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4 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
December 2011 MICRO-44: Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Publisher: ACM
Bibliometrics:
Citation Count: 24
Downloads (6 Weeks): 3,   Downloads (12 Months): 59,   Downloads (Overall): 908

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Hardware prefetching and last-level cache (LLC) management are two independent mechanisms to mitigate the growing latency to memory. However, the interaction between LLC management and hardware prefetching has received very little attention. This paper characterizes the performance of state-of-the-art LLC management policies in the presence and absence of hardware prefetching. ...
Keywords: prefetch-aware replacement, set dueling, reuse distance prediction, shared cache

2 published by ACM
December 2011 MICRO-44: Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Publisher: ACM
Bibliometrics:
Citation Count: 33
Downloads (6 Weeks): 5,   Downloads (12 Months): 222,   Downloads (Overall): 1,125

Full text available: PDFPDF
The shared last-level caches in CMPs play an important role in improving application performance and reducing off-chip memory bandwidth requirements. In order to use LLCs more efficiently, recent research has shown that changing the re-reference prediction on cache insertions and cache hits can significantly improve cache performance. A fundamental challenge, ...
Keywords: replacement, reuse distance prediction, shared cache

3
April 2011 ISPASS '11: Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 12

Given the emerging dominance of CMPs, an important research problem concerns application memory performance in the face of deep memory hierarchies, where one or more caches are shared by several cores. In current systems, many factors can cause interference in the shared last-level cache (LLC). While predicting an application's memory ...

4 published by ACM
February 2011 ACM Transactions on Architecture and Code Optimization (TACO): Volume 8 Issue 1, April 2011
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 0,   Downloads (12 Months): 9,   Downloads (Overall): 330

Full text available: PDFPDF
In chip multiprocessors (CMPs), several high-performance cores typically compete for capacity in a shared last-level cache. This causes degraded and unpredictable memory performance for multiprogrammed and parallel workloads. In response, recent schemes apportion cache bandwidth and capacity in ways that offer better aggregate performance for the workloads. These schemes, however, ...
Keywords: shared resource management, Cache decay, capacity management



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