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 Jesse Elwell

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Average citations per article3.17
Citation Count19
Publication count6
Publication years2011-2017
Available for download6
Average downloads per article159.17
Downloads (cumulative)955
Downloads (12 Months)328
Downloads (6 Weeks)37
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6 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
June 2017 DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 12,   Downloads (12 Months): 65,   Downloads (Overall): 65

Full text available: PDFPDF
Recently, side-channel attacks on Last Level Caches (LLCs) were demonstrated. The attacks require the ability to evict critical data from the cache hierarchy, making future accesses visible. We propose Relaxed Inclusion Caches (RIC), a low-complexity cache design protecting against LLC side channel attacks. RIC relaxes inclusion when it is not ...

2 published by ACM
April 2017 ASIA CCS '17: Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 10,   Downloads (12 Months): 123,   Downloads (Overall): 123

Full text available: PDFPDF
Recent work has investigated the use of hardware performance counters (HPCs) for the detection of malware running on a system. These works gather traces of HPCs for a variety of applications (both malicious and non-malicious) and then apply machine learning to train a detector to distinguish between benign applications and ...
Keywords: rootkits, intrusion detection, machine learning, hardware performance counters

3 published by ACM
December 2015 ACM Transactions on Architecture and Code Optimization (TACO): Volume 12 Issue 4, January 2016
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 5,   Downloads (12 Months): 70,   Downloads (Overall): 192

Full text available: PDFPDF
The inclusive permissions structure (e.g., the Intel ring model) of modern commodity CPUs provides privileged system software layers with arbitrary permissions to access and modify client processes, allowing them to manage these clients and the system resources efficiently. Unfortunately, these inclusive permissions allow a compromised high-privileged software layer to perform ...
Keywords: security, system software, Architecture

4
December 2014 MICRO-47: Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 14
Downloads (6 Weeks): 6,   Downloads (12 Months): 43,   Downloads (Overall): 135

Full text available: PDFPDF
We consider the problem of how to provide an execution environment where the application's secrets are safe even in the presence of malicious system software layers. We propose Iso-X --- a flexible, fine-grained hardware-supported framework that provides isolation for security-critical pieces of an application such that they can execute securely ...
Keywords: isolated execution, hardware security

5 published by ACM
June 2011 DAC '11: Proceedings of the 48th Design Automation Conference
Publisher: ACM
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 4,   Downloads (12 Months): 24,   Downloads (Overall): 247

Full text available: PDFPDF
This paper presents a simulation toolset for estimating the impact of Trusted Platform Modules (TPMs) on the performance of applications that use TPM services, especially in multi-core environments. The proposed toolset, consisting of an integrated CPU/TPM simulator and a set of micro-benchmarks that exercise the major TPM services, can be ...
Keywords: performance evaluation, trusted platform module

6
January 2011 ASPDAC '11: Proceedings of the 16th Asia and South Pacific Design Automation Conference
Publisher: IEEE Press
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 0,   Downloads (12 Months): 3,   Downloads (Overall): 193

Full text available: PDFPDF
Embedded systems are designed to perform a specific set of tasks, and are frequently found in mobile, power-constrained environments. There is growing interest in the use of parallel computation as a means to increase performance while reducing power consumption. In this paper, we highlight fundamental limits to what can and ...



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