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 Lihang Zhao

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Bibliometrics: publication history
Average citations per article1.50
Citation Count6
Publication count4
Publication years2012-2016
Available for download2
Average downloads per article93.50
Downloads (cumulative)187
Downloads (12 Months)34
Downloads (6 Weeks)5
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4 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
January 2016 ACM Transactions on Architecture and Code Optimization (TACO): Volume 12 Issue 4, January 2016
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 5,   Downloads (12 Months): 29,   Downloads (Overall): 113

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Hardware Transactional Memory (HTM) relies heavily on the on-chip network for intertransaction communication. However, the network bandwidth utilization of transactions has been largely neglected in HTM designs. In this work, we propose a cost model to analyze network bandwidth in transaction execution. The cost model identifies a set of key ...
Keywords: on-chip network, communication cost modeling, energy efficiency, Transactional memory, network traffic

2 published by ACM
September 2012 PACT '12: Proceedings of the 21st international conference on Parallel architectures and compilation techniques
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 0,   Downloads (12 Months): 5,   Downloads (Overall): 74

Full text available: PDFPDF
Hardware Transactional Memory (HTM) designs must implement conflict detection to guarantee the correctness of transaction execution. A conflict occurs when more than one transaction access the same data and at least one of them attempts to modify the data. The corresponding conflict detection mechanism usually works at a cacheline level ...
Keywords: on-chip network, hardware transactional memory

3
May 2012 IPDPSW '12: Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

Transactional memory has been proposed as an optimistic concurrency-control construct to ease parallel programming. Hardware transactional memory (HTM) approaches implement version management and conflict detection in hardware to guarantee the correctness of transaction execution. Based on the style of version management and conflict detection, state-of-the-art HTM systems fall into two ...

4
May 2012 IPDPS '12: Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 5

Hardware Transactional Memory (HTM) systems implement version management and conflict detection in hardware to guarantee that each transaction is atomic and executes in isolation. In general, HTM implementations fall into two categories, namely, eager systems and lazy systems. Lazy systems have been shown to exploit more concurrency from potentially conflicting ...
Keywords: Hardware Transactional Memory, Version Management, Conflict Point Discovery, SEL-TM



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