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 Sarani Bhattacharya

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Bibliometrics: publication history
Average citations per article1.00
Citation Count4
Publication count4
Publication years2012-2016
Available for download3
Average downloads per article75.67
Downloads (cumulative)227
Downloads (12 Months)77
Downloads (6 Weeks)19
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1 published by ACM
January 2018 ACM Transactions on Privacy and Security (TOPS): Volume 21 Issue 1, January 2018
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 17,   Downloads (12 Months): 17,   Downloads (Overall): 17

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Hardware performance counters (HPCs) are useful artifacts for evaluating the performance of software implementations. Recently, HPCs have been made more convenient to use without requiring explicit kernel patches or superuser privileges. However, in this article, we highlight that the information revealed by HPCs can be also exploited to attack standard ...
Keywords: hardware performance counters, side channel, architecture security, Branch misprediction, public key cipher

2 published by ACM
June 2016 HASP 2016: Proceedings of the Hardware and Architectural Support for Security and Privacy 2016
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 7,   Downloads (12 Months): 35,   Downloads (Overall): 35

Full text available: PDFPDF
Hardware cache prefetching has a profound impact on the memory access pattern of ciphers which are exploited in profiled cache-timing attacks. In this paper, we formally demonstrate that memory access patterns influenced by sequential prefetching and its variant, known as even-odd prefetcher has varying information leakage dependent on the alignment ...
Keywords: profiled cache-timing attacks, cache miss, quantifying information leakage, Hardware Prefetcher

December 2014
Citation Count: 0

This book deals with timing attacks on cryptographic ciphers. It describes and analyzes various unintended covert timing channels that are formed when ciphers are executed in microprocessors. The book considers modern superscalar microprocessors which are enabled with features such as multi-threaded, pipelined, parallel, speculative, and out-of order execution. Various timing ...

4 published by ACM
June 2013 HASP '13: Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 1,   Downloads (12 Months): 16,   Downloads (Overall): 122

Full text available: PDFPDF
Timing attacks are a threat to networked computing systems especially the emerging cloud computing infrastructures. The precision timestamp counters present in modern microprocessors is a popularly used side channel source for timing information. These counters are able to measure the variability of timings that are caused from microarchitectural effects, like ...
Keywords: timewarp, cache attacks, timing attack, time-fuzzying

December 2012 MICROW '12: Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture Workshops
Publisher: IEEE Computer Society
Citation Count: 4
Downloads (6 Weeks): 2,   Downloads (12 Months): 3,   Downloads (Overall): 32

Full text available: PDFPDF

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