ACM Transactions on Architecture and Code Optimization (TACO): Volume 10 Issue 3, September 2013
Citation Count: 7
Downloads (6 Weeks): 2, Downloads (12 Months): 21, Downloads (Overall): 377
Full text available:
Balancing Instruction-Level Parallelism (ILP) and register pressure during preallocation instruction scheduling is a fundamentally important problem in code generation and optimization. The problem is known to be NP-complete. Many heuristic techniques have been proposed to solve this problem. However, due to the inherently conflicting requirements of maximizing ILP and minimizing ...
Compiler optimizations, NP-complete problems, instruction-level parallelism (ILP), register pressure reduction, branch-and-bound enumeration, performance optimization, optimal instruction scheduling