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 Yuan Xie

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Average citations per article4.00
Citation Count4
Publication count1
Publication years2014-2014
Available for download1
Average downloads per article526.00
Downloads (cumulative)526
Downloads (12 Months)25
Downloads (6 Weeks)3
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February 2014 ACM Transactions on Architecture and Code Optimization (TACO): Volume 11 Issue 1, February 2014
Publisher: ACM
Bibliometrics:
Citation Count: 4
Downloads (6 Weeks): 3,   Downloads (12 Months): 25,   Downloads (Overall): 526

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Nonvolatile memories (NVMs) have the potential to replace low-level SRAM or eDRAM on-chip caches because NVMs save standby power and provide large cache capacity. However, limited write endurance is a common problem for NVM technologies, and today's cache management might result in unbalanced cache write traffic, causing heavily written cache ...
Keywords: Cache, interset write variation, lifetime improvement, write endurance, wear leveling, intraset write variation



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