Marcio Machado Pereira
Marcio Machado Pereira

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mpereiraatic.unicamp.br

 
Bibliometrics: publication history
Average citations per article0.00
Citation Count0
Publication count3
Publication years2014-2017
Available for download1
Average downloads per article168.00
Downloads (cumulative)168
Downloads (12 Months)67
Downloads (6 Weeks)8
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3 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
May 2017 ACM Transactions on Architecture and Code Optimization (TACO): Volume 14 Issue 2, July 2017
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 8,   Downloads (12 Months): 67,   Downloads (Overall): 168

Full text available: PDFPDF
Directive-based programming models, such as OpenACC and OpenMP, allow developers to convert a sequential program into a parallel one with minimum human intervention. However, inserting pragmas into production code is a difficult and error-prone task, often requiring familiarity with the target program. This difficulty restricts the ability of developers to ...
Keywords: Automatic parallelization, static analysis

2
October 2014 SBAC-PAD '14: Proceedings of the 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

This paper presents an extensive performance study of the implementation of Hardware Transactional Memory (HTM) in the Haswell generation of Intel x86 core processors. This study evaluates the strengths and weaknesses of this new architecture exploring several dimensions in the space of Transactional Memory (TM) application characteristics using the Eigenbench ...

3
September 2014 BRACIS '14: Proceedings of the 2014 Brazilian Conference on Intelligent Systems
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

One of the greatest challenges of modern computing is the development of software optimized for parallel execution in multi-core processors. Transactional Memory (TM) is a new trend in concurrency control that has emerged to address these challenges. TM promises the performance of finer grain locks combined with lower programming complexity. ...
Keywords: Software Transaction Memory, Concurrency, Parallel Programming



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