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 Milan Radulovic

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Average citations per article1.83
Citation Count11
Publication count6
Publication years2015-2017
Available for download5
Average downloads per article166.80
Downloads (cumulative)834
Downloads (12 Months)604
Downloads (6 Weeks)24
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6 results found Export Results: bibtexendnoteacmrefcsv

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1 published by ACM
March 2017 ACM Transactions on Architecture and Code Optimization (TACO): Volume 14 Issue 1, April 2017
Publisher: ACM
Bibliometrics:
Citation Count: 0
Downloads (6 Weeks): 14,   Downloads (12 Months): 412,   Downloads (Overall): 412

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An important aspect of High-Performance Computing (HPC) system design is the choice of main memory capacity. This choice becomes increasingly important now that 3D-stacked memories are entering the market. Compared with conventional Dual In-line Memory Modules (DIMMs), 3D memory chiplets provide better performance and energy efficiency but lower memory capacities. ...
Keywords: HPL, high-performance computing, HPCG, production HPC applications, Memory capacity requirements

2 published by ACM
October 2016 MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 3,   Downloads (12 Months): 44,   Downloads (Overall): 83

Full text available: PDFPDF
Energy consumption is by far the most important contributor to HPC cluster operational costs, and it accounts for a significant share of the total cost of ownership. Advanced energy-saving techniques in HPC components have received significant research and development effort, but a simple measure that can dramatically reduce energy consumption ...
Keywords: Capacity computing, Energy efficiency, High-performance computing, Large-memory nodes, Scaling-in

3 published by ACM
October 2016 MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems
Publisher: ACM
Bibliometrics:
Citation Count: 1
Downloads (6 Weeks): 5,   Downloads (12 Months): 60,   Downloads (Overall): 91

Full text available: PDFPDF
In high-performance computing (HPC), significant effort is invested in research and development of novel memory technologies. One of them is Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) --- byte-addressable, high-endurance non-volatile memory with slightly higher access time than DRAM. In this study, we conduct a preliminary assessment of HPC ...
Keywords: High-performance computing, Main memory, STT-MRAM

4 published by ACM
October 2015 MEMSYS '15: Proceedings of the 2015 International Symposium on Memory Systems
Publisher: ACM
Bibliometrics:
Citation Count: 6
Downloads (6 Weeks): 2,   Downloads (12 Months): 73,   Downloads (Overall): 203

Full text available: PDFPDF
First defined two decades ago, the memory wall remains a fundamental limitation to system performance. Recent innovations in 3D-stacking technology enable DRAM devices with much higher bandwidths than traditional DIMMs. The first such products will soon hit the market, and some of the publicity claims that they will break through ...
Keywords: HPC, DRAM, Memory wall, bandwidth, high bandwidth memory (HBM), hybrid memory cube (HMC), latency

5
May 2015 ICPC '15: Proceedings of the 2015 IEEE 23rd International Conference on Program Comprehension
Publisher: IEEE Computer Society
Bibliometrics:
Citation Count: 0

Characterization of high-performance computing applications often has to be done without access to the source code. Computer architects, therefore, have a narrowed choice of instrumentation tools. Moreover, potentially large amount of collected data can prohibit creating a full time stamped event trace and analyzing it post-mortem. This paper describes Limpio--a ...

6
May 2015 ICPC '15: Proceedings of the 2015 IEEE 23rd International Conference on Program Comprehension
Publisher: IEEE Press
Bibliometrics:
Citation Count: 3
Downloads (6 Weeks): 0,   Downloads (12 Months): 15,   Downloads (Overall): 45

Full text available: PDFPDF
Characterization of high-performance computing applications often has to be done without access to the source code. Computer architects, therefore, have a narrowed choice of instrumentation tools. Moreover, potentially large amount of collected data can prohibit creating a full timestamped event trace and analyzing it post-mortem. This paper describes Limpio --- ...



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