Author image not provided
 Darko Zivanovic

  Affiliation history
Bibliometrics: publication history
Average citations per article2.33
Citation Count7
Publication count3
Publication years2015-2017
Available for download3
Average downloads per article232.67
Downloads (cumulative)698
Downloads (12 Months)529
Downloads (6 Weeks)19
Arrow RightAuthor only

See all colleagues of this author


3 results found Export Results: bibtexendnoteacmrefcsv

Result 1 – 3 of 3
Sort by:

1 published by ACM
March 2017 ACM Transactions on Architecture and Code Optimization (TACO): Volume 14 Issue 1, April 2017
Publisher: ACM
Citation Count: 0
Downloads (6 Weeks): 14,   Downloads (12 Months): 412,   Downloads (Overall): 412

Full text available: PDFPDF
An important aspect of High-Performance Computing (HPC) system design is the choice of main memory capacity. This choice becomes increasingly important now that 3D-stacked memories are entering the market. Compared with conventional Dual In-line Memory Modules (DIMMs), 3D memory chiplets provide better performance and energy efficiency but lower memory capacities. ...
Keywords: HPL, high-performance computing, HPCG, production HPC applications, Memory capacity requirements

2 published by ACM
October 2016 MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems
Publisher: ACM
Citation Count: 1
Downloads (6 Weeks): 3,   Downloads (12 Months): 44,   Downloads (Overall): 83

Full text available: PDFPDF
Energy consumption is by far the most important contributor to HPC cluster operational costs, and it accounts for a significant share of the total cost of ownership. Advanced energy-saving techniques in HPC components have received significant research and development effort, but a simple measure that can dramatically reduce energy consumption ...
Keywords: Capacity computing, Energy efficiency, High-performance computing, Large-memory nodes, Scaling-in

3 published by ACM
October 2015 MEMSYS '15: Proceedings of the 2015 International Symposium on Memory Systems
Publisher: ACM
Citation Count: 6
Downloads (6 Weeks): 2,   Downloads (12 Months): 73,   Downloads (Overall): 203

Full text available: PDFPDF
First defined two decades ago, the memory wall remains a fundamental limitation to system performance. Recent innovations in 3D-stacking technology enable DRAM devices with much higher bandwidths than traditional DIMMs. The first such products will soon hit the market, and some of the publicity claims that they will break through ...
Keywords: HPC, DRAM, Memory wall, bandwidth, high bandwidth memory (HBM), hybrid memory cube (HMC), latency

The ACM Digital Library is published by the Association for Computing Machinery. Copyright © 2018 ACM, Inc.
Terms of Usage   Privacy Policy   Code of Ethics   Contact Us