Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor

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Authors:	Dean M. Tullsen	Dept of Computer Science and Engineering, University of Washington, Box 352350, Seattle, WA
	Susan J. Eggers	Dept of Computer Science and Engineering, University of Washington, Box 352350, Seattle, WA
	Joel S. Emer	Digital Equipment Corporation, HLO2-3/J3, 77 Reed Road, Hudson, MA
	Henry M. Levy	Dept of Computer Science and Engineering, University of Washington, Box 352350, Seattle, WA
	Jack L. Lo	Dept of Computer Science and Engineering, University of Washington, Box 352350, Seattle, WA
	Rebecca L. Stamm	Digital Equipment Corporation, HLO2-3/J3, 77 Reed Road, Hudson, MA

	1996 Article
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Published in:

	· Proceeding
	ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
	Pages 191-202 Philadelphia, Pennsylvania, USA — May 22 - 24, 1996 ACM New York, NY, USA ©1996 table of contents ISBN:0-89791-786-3 doi>10.1145/232973.232993
	· Newsletter
	ACM SIGARCH Computer Architecture News - Special Issue: Proceedings of the 23rd annual international symposium on Computer architecture (ISCA '96) Homepage
	Volume 24 Issue 2, May 1996 Pages 191 - 202 ACM New York, NY, USA table of contents doi>10.1145/232974.232993

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