ISAAC: a convolutional neural network accelerator with in-situ analog arithmetic in crossbars

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Authors: Ali Shafiee University of Utah
Anirban Nag University of Utah
Naveen Muralimanohar Hewlett Packard Labs
Rajeev Balasubramonian University of Utah
John Paul Strachan Hewlett Packard Labs
Miao Hu Hewlett Packard Labs
R. Stanley Williams Hewlett Packard Labs
Vivek Srikumar University of Utah
ISAAC: a convolutional neural network accelerator with in-situ analog arithmetic in crossbars 2016 Article
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· Proceeding
ISCA '16 Proceedings of the 43rd International Symposium on Computer Architecture
Pages 14-26

Seoul, Republic of Korea — June 18 - 22, 2016
IEEE Press Piscataway, NJ, USA ©2016
table of contents ISBN: 978-1-4673-8947-1 doi>10.1109/ISCA.2016.12
· Newsletter
ACM SIGARCH Computer Architecture News - ISCA'16
Volume 44 Issue 3, June 2016
Pages 14-26
ACM New York, NY, USA
table of contents doi>10.1145/3007787.3001139

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