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Verification of FM9801: An Out-of-Order Microprocessor Model with Speculative Execution, Exceptions, and Program-Modifying Capability
Authors:
Jun Sawada
IBM Austin Research Laboratory, 11400 Burnet Road, Austin, TX 78758, USA
Warren A. Hunt, Jr.
IBM Austin Research Laboratory, 11400 Burnet Road, Austin, TX 78758, USA
Published in:
· Journal
Formal Methods in System Design
archive
Volume 20 Issue 2, March 2002
Pages 187-222
Kluwer Academic Publishers
Hingham, MA
, USA
table of contents
doi>
10.1023/A:1014122630277
2002 Article
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· Citation Count: 9
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Author Tags
design
formal verification
microcomputers
out-of-order execution
pipelined microprocessor
theorem prover
theory
verification
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