New non-volatile memory structures for FPGA architectures

Abstract

A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is described. The PEs have small area, can be combined with components that use low operational voltage on the same CMOS logic process, are non-volatile, enable the use of fast thin-oxide pass transistors, and are reprogrammable. A novel non-volatile flip-flop for use within the logical elements is presented as well. In combination, these methods enable programmable logic devices with improved area efficiency, the speed advantages of SRAM-based FPGAs, and a wide range of opportunities for power down strategies.

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Index Terms

• Hardware

  • Electronic design automation

    • Physical design (EDA)

  • Hardware validation

  • Integrated circuits

    • Semiconductor memory

      • Static memory

  • Very large scale integration design

    • Application-specific VLSI designs