Abstract
Given a description of a computer called the “target” and a micro processor called the “host” we would like to generate a micro program which when executed by the host will simulate the target. We accomplish this by first breaking the target down into a set of small segments. Then, logical conditions for an appropriate microcode are generated for each segment by a combination of symbolic execution and simplification. When completed, the segments are assembled into a working code by solving the set of logical conditions.
- 1 SYMBOLIC EXECUTION OF FORMAL MACHINE DESCRIPTIONS, John D. Oakley, Carnegie-Mellon University; April, 1979.Google Scholar
- 2 MICROCODE VERIFICATION PROJECT FINAL REPORT; Stephen D. Crocker, USC Information Sciences Institute, December, 1979.Google Scholar
- 3 A DISCIPLINE OF PROGRAMMING; E.W. Dijkstra, Prentice-Hall, 1976.Google Scholar
- 4 FORMALIZATION AND AUTOMATIC DERIVATION OF CODE GENERATORS; R. G. G. Cattell, Carnegie-Mellon University, April, 1978.Google Scholar
- 5 THE ISPS COMPUTER DESCRIPTION LANGUAGE, 1977; Mario R. Barbacci, Gary E. Barnes, Roderic G. Cattell, and Daniel P. Siewiorek, Carnegie-Mellon University, 1977.Google Scholar
Index Terms
The derivation of microcode by symbolic execution
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