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2n-way jump microinstruction hardware and an effective instruction binding method

Published:30 November 1980Publication History
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Abstract

A scheme is developed by which multiway microprogram jumps may be made to any of 2n next possible microinstructions as a function of any selection of n > 1 logically independent tests. An efficient method of binding microinstructions to memory locations allows this to be done at very low cost, both in terms of speed and hardware.

Independent simultaneous tests are a necessity if horizontally microcodable machines are to continue to get wider, since algorithms presumably have fixed operations/tests ratios. This scheme will give parallelizers for such machines maximum flexibility in rearranging flow control.

References

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            cover image ACM SIGMICRO Newsletter
            ACM SIGMICRO Newsletter  Volume 11, Issue 3-4
            Dec. 1980
            177 pages
            ISSN:1050-916X
            DOI:10.1145/1014190
            Issue’s Table of Contents

            Copyright © 1980 Author

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            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 30 November 1980

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