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Performance evaluation and improvement of a dynamically microprogrammable computer with low-level parallelism

Published:30 November 1980Publication History
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Abstract

A new microprogrammable computer with low-level parallelism was built and has been utilized as a research vehicle for solving different classes of research-oriented applications such as real-time processings on static/dynamic images, pictures and signals, and emulations of both existing and virtual machines including high (intermediate) level language machines.

The design goal of a research-oriented computer, QA-1, was to achieve a high degree of processing power and system flexibility by means of a low-level parallel processing organization combined with dynamically microprogrammable control. This paper describes the QA-1's architecture-tailorability to different classes of emulations for existing machines such as the PDP-11/40 and the HITAC-10, and for high-level language machines such as, BASIC and PASCAL machines. All the results obtained from these experiments, together with the ones from well-defined applications such as a real-time color animation presented in another paper, have clarified some drawbacks of the QA-1 in its architectural uniformity, high functionality and microprogram productivity. On the basis of these final evaluations of the QA-1, this paper proposes a new architecture for a next generation computer, QA-2.

References

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              cover image ACM SIGMICRO Newsletter
              ACM SIGMICRO Newsletter  Volume 11, Issue 3-4
              Dec. 1980
              177 pages
              ISSN:1050-916X
              DOI:10.1145/1014190
              Issue’s Table of Contents

              Copyright © 1980 Authors

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              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 30 November 1980

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